Manual PCI-WDG-CSM
6
There are several inputs and outputs from the card: (See Chapter 6 for pinout.)
a.
Double-pole double-throw, Form C, relay contacts on the rear panel I/O connector.
b.
An opto-isolated reset output on the rear panel I/O connector.
c.
An opto-isolated complement of the reset output on the rear panel I/O connector.
d.
A buffered TTL CTRGATE (counter enabled) output on the rear panel I/O connector.
e.
TTL Reset signal (active high) on internal terminal block.
f.
Open collector Reset signal (active low) on internal terminal block.
g.
A Watchdog 130.208KHz "heartbeat" on the rear panel I/O connector.
h.
Un-fused 5V DC output at the rear panel I/O connector.
i.
Fan Drive Power return on internal terminal block.
j.
Fan Drive Power out on internal terminal block.
k.
"Fan Reset" can initiate a fan restart if the fan stops. (pulled down, requires a momentary
high signal to initiate a fan restart)
As noted in items b. and c. above, opto-coupled outputs (one ON when the other is OFF) are provided for
use where relay contact bounce could be a problem. Further, as noted in e. above, a buffered discrete
output is also provided. This output goes high to signal a watchdog reset condition. Finally, a 130.208
kHz, TTL-level, 50 percent duty cycle signal is provided at I/O connector pin 13 when the watchdog circuit
is enabled and no reset is in progress. Otherwise, this output is in a low state.
