When the BAUD jumper is in the X1 position, the UART clock frequency is 1.8432MHz. When the
jumper is in the X4 position, the clock frequency is 7.3728 MHz. The following table lists popular
divisor frequencies. Note that there are two columns to consider depending on the position of the
BAUD jumper.
Baud Rate Divisor x1
Divisor x4
Max Diff. Cable Length*
460800 -
1
550
ft
230400 -
2
1400
ft
153600 -
3
2500
ft
115200 1
4
3000
ft
57600 2
8
4000
ft
38400 3
12
4000
ft
28800 4
16
4000
ft
19200 6
24
4000
ft
14400 8
32
4000
ft
9600
12
48 – Most Common 4000 ft
4800 24 96
4000
ft
2400 48 192
4000
ft
1200 96 384
4000
ft
* Recommended maximum distances for differentially driven data cables (RS422 or RS485) are for typical conditions.
Table 5-1:
Baud Rate Divisor Values
In C, the code to set the chip to 9600 baud is:
outportb(BASEADDR, 0x0C);
outportb(BA1,0);
The second initializing step is to set the Line Control Register at Base A3. This register
defines word length, stop bits, parity, and the DLAB.
Bits 0 and 1 control word length and allow word lengths from 5 to 8 bits. Bit settings are
extracted by subtracting 5 from the desired word length.
Bit 2 determines the number of stop bits. There can be either one or two stop bits. If Bit 2 is
set to 0, there will be one stop bit. If Bit 2 is set to 1, there will be two stop bits.
Bits 3 through 6 control parity and break enable. They are not commonly used for
communications and should be set to zeroes.
Bit 7 is the DLAB discussed earlier. It must be set to zero after the divisor is loaded or else
there will be no communications.
The C command to set the UART for an 8-bit word, no parity, and one stop bit is:
outportb(BA3, 0x03)
The third step of the initialization sequence is to set the Modem Control Register at Base Address
+4. Bit 1 is the Request to Send (RTS) control bit. This bit should be left low until transmission
time. (Note: When operating in the automatic RS485 mode, the state of this bit is not significant.)
Bits 2 and 3 are user-designated outputs. Bit 2 may be ignored on this card. Bit 3 is used to
enable interrupts and should be set high if an interrupt-driven receiver is to be used.
Manual PCI-ICM-2S
14
