Manual PCI-DIO-48JP/JPS
14
Bit Assignment
Code
D0
D1
D2
D3
D4
D5,D6
D7
Port C Lo (C0-C3)
Port B
Mode Select
Port C Hi (C4-C7)
Port A
Mode Select
Mode Set Flag
1=Input, 0=Output
1=Input, 0=Output
1=Mode 1, 0=Mode 0
1=Input, 0=Output
1=Input, 0=Output
00=Mode 0, 01=Mode 1, 1X=Mode 2
1=Active
Table 6-2: Control Register Bit Assignment
Note:
Mode 1 cannot be used by these cards without modification. Thus, bits D2, D5, and D6
should always be set to "0". If your card has been modified to operate in Mode 1, then there
will be an Addendum page in the front of this manual. These cards cannot be used in Mode
2 of the PPI.
These cards provide a means to enable/disable the tristate I/O buffers under program control. If the
TST/BEN jumper on the card is installed in the BEN position, the I/O buffers are permanently enabled.
However, if that jumper is in the TST position, enable/disable of the buffers is
software controlled
via the
control register as follows:
a. The card is initialized in the receive mode by the computer reset command.
b. When bit D7 of the Control Register is set high, direction of the three groups of the associated PPI
chip as well as the mode can be set. For example, a write to Base A3 with data bit D7 high
programs port direction at group 0 ports A, B, and C. If, for example, hex 80 is sent to Base Address
+3, the group 0 PPI will be configured in mode 0 with ports A, B, and C as outputs.
At the same time, data bit D7 is also latched in a buffer controller for the associated PPI chip. A high
state disables the buffers and, thus, all four buffers will be put in the tristate mode; i.e. disabled.
c. If any of the ports are to be set as outputs, you may set the values to the respective port with the
outputs still in the tristate condition. (If all ports are to be set as inputs, this step is not necessary.)
d. If data bit D7 is low when the control byte is written, ONLY the associated buffer controller is
addressed. If, for example, a control byte of hex 80 has been sent as previously described, and the
data to be output are correct, and it is now desired to open the three ports, then it is necessary to send
a control byte of hex 00 to base a3 to enable the port 0 buffers. When you do this, the buffers
will be enabled.
Note that all data bits except D7 must be the same for the two control bytes
Those buffers will now remain enabled until another control byte with data bit D7 high is sent to base
a3.
