Abov MC96F8204 Series, Руководство пользователя

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85
MC96F8204 ABOV Semiconductor Co., Ltd.
11.1.3 Register Map
Name Address Direction Default Description
SCCR 8AH R/W 00H System and Clock Control Register
OSCCR C8H R/W 08H Oscillator Control Register
LIFSR C9H R/W 00H LFIRC Frequency Selection Register
XTFLSR BFH R/W 00H X-tal Filter Selection Register
Table 11.1
Clock Generator Register Map
11.1.4 Clock Generator Register Description
The clock generator register uses clock control for system operation. The clock generation consists of System and
clock control register, oscillator control register, LFIRC frequency selection register and X-tal filter selection register.
11.1.5 Register Description for Clock Generator
SCCR (System and Clock Control Register) : 8AH
7 6 5 4 3 2 1 0
– – – – – –
SCLK1 SCLK0
– – – – – –
R/W R/W
Initial value : 00H
SCLK [1:0] System Clock Selection Bit
SCLK1 SCLK0 Description
0 0 HF INT-RC OSC (fHFIRC) for system clock
0 1 External Main OSC (fXIN) for system clock
1 0 External Sub OSC (fSUB) for system clock
1 1 LF INT-RC OSC (fLFIRC) for system clock
NOTE)
1. If a target system clock is disabled by the OSCCR register, the SCCR register won
’t be changed in case
of selecting the corresponding clock as a system clock.