bdi
GDB
for GNU Debugger, BDI2000 (ARM11 / Cortex)
User Manual
23
© Copyright 1997-2014 by ABATRON AG Switzerland
V 1.21
WBIN address filename Write a binary image to the selected memory place. The binary image is
read via TFTP from the host. Up to 4 such entries are supported.
address
the memory address
filename
the filename including the full path
Example:
WBIN 0x4000 pagetable.bin
RM8 address [xor]
Read a byte (8bit) from the selected memory place.
RM16 address [xor]
Read a half word (16bit) from the selected memory place.
RM32 address [xor]
Read a word (32bit) from the selected memory place.
address
the memory address
xor
optional XOR pattern applied to the read value
Example:
RM32 0x00000000
WMX and or
Writes back a modified read value. The address and size is the same as
used by RM8, RM16 or RM32. This allows simple bit manipulations.
and
the AND pattern applied to the read value
or
the OR pattern applied to the read value
Example:
RM32 0x200000000 0x10101010 ; read and XOR
WMX 0xff00ff00 0x00000003 ; AND, OR and write back
WAIT mask equal
Waits until ((memory & mask) == equal). The last RM8, RM16 or RM32
entry defines the address and the size for the following WAIT.
mask
the bit mask used before comparing
equal
the value to compare against
Example: RM16
0x2000000a
WAIT 0x000f0ff 0x00001034 ; wait until equal
MMAP start end
Because a memory access to an invalid memory space via JTAG leads to
a deadlock, this entry can be used to define up to 32 valid memory ranges.
If at least one memory range is defined, the BDI checks against this
range(s) and avoids accessing of not mapped memory ranges.
start
the start address of a valid memory range
end
the end address of this memory range
Example:
MMAP 0xFFE00000 0xFFFFFFFF ;Boot ROM
DELAY value
Delay for the selected time.
value
the delay time in milliseconds (1...30000)
Example:
DELAY 500 ; delay for 0.5 seconds
CLOCK value
This entry allows to change the JTAG clock frequency during processing
of the init list. But the final JTAG clock after processing the init list is taken
from the CLOCK entry in the [TARGET] section. This entry maybe of in-
terest to speed-up JTAG clock as soon as possible (after PLL setup).
value
see CLOCK parameter in [TARGET] section
Example:
CLOCK 2 ; switch to 8 MHz JTAG clock