Publication No. HRMCR11 Rev. B.0
About This Manual 23
Booting
blink or be on co
n
tin
u
ous
l
y
.
The CR! I, CPI I, CTI I additional
h
ave a blue Hot Swap LED as required
according to the PICMG specification. This blue LED is also an indication for a
reset condition.
While numing i
ts
BIOS initializatio
n
all boards of the CR! I fawily write
postcodes (POST= Power-On Self Test) to port 80h at the PCI bus O
(
at
PMC2). These accesses can be monitored with appropriate equipment or a
PMC post card
.
For easier access the postcodes are sent al
s
o to the parallel port
LPTI data lines
.
When measuring their values or adding 8 LED
s
with current
lin1iting resistors to GND, you can follow the POST sequence of the BIOS
.
When the boot process stops at a certain point also the eight voltage le
v
e
ls
can
be measured with a multin1eter.
•
Some more debug support is integrated on the CR! I family, which beeps
the postcode if the POST stops before the display is initialized. This POST
beep support can be removed at a later development stage, if the required
space within the onboard programmab
l
e logic is no longer available, so
don
'
t rely on this. The beeps are long for a
'
I
'
and short for a
'
O
'
.
They
start with the highest bit 7 and beep 8 represents the lowest bit
0
.
If the last
postcode was a 16bit value then you will hear 16 beeps starting with the
highest bit
1
5
.
A
l
wa
ys
after a nibb
l
e (4bits) there is a short break in the
be.ep
s
equence
.
Aft.er some seconds the beep sequence is repeated for an
easier recognit
i
o
n
. If the beep code is not repeated, then this beeps are
issued within the BIOS execution to show some other failures (i.e. fails in
memory detection or if no VGA is detected). For more information please
check the AMIBI0S8 C
h
eck Point and Beep Code List as well as the
AMIBIOS8 Error
M
essage
s
.
When switching-on the CR! I following steps are done by hardware
:
On the CR! I family
,
all voltages at the bacl..'Plane are observed until they reach
a fir
s
t trip point whic
h
is 2.5 Vat the 5 V
/
3.3 V rails and 9.5
V
at the +12 V
rail. After this the onboard voltages are controlled raised up to the external
supplied value
The continuo
u
s red Stanis LED shows that all circuitry is in reset
All onboard DC/DC conv.erters are ramped up
If all onboard supply voltages are at their correct va
l
ues
,
the 'power good'
stanis is acknowledged to all onboard devices and the red LED is switched off
On the CR! I family, the blue Hot Swap LED is switched off when the onboard
PCI reset is released. Especially when the battery is removed, this can take a
few seconds to start
th
e 32 kHz Oscillator. The PCI reset gets inactive after
t
hi
s
period
.
Aft.er this the CPU starts reading the first instructions from BIOS
.
Very soon
the red LED is programmed to a red blinking state and the first postcode is
issued
If the CPU does not
s
tart correctl
y
,
the red LED keeps off until the
h
ardware
watchdog will i
s
s
u
e a further reset 1.6 seconds later
.
You can see thi
s
at the red
LED, whic
h
is on again for a short moment (at the CR! I family also the blue
LED). TI1is sequence continues until the CPU starts correctly.
For reference the complete BIOS boot sequence is
s
hown with the c
u
rrent
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