Chapter 3 Award BIOS Setup
51
Advanced Chipset Features
DRAM Timing By SPD
This item allows you to select the value in this field, depending
on whether the board has paged DRAMs or EDO (extended data
output) DRAMs.
The choices: Enabled, Disabled.
DRAM Clock
This item allows you to control the DRAM speed.
The choice: Host Clock, HCLK-33M, HCLK+33M.
SDRAM Cycle Length
This field sets the CAS latency timing.
The choices: 3, 2.
Содержание VIA Eden Series
Страница 1: ...Gene 6310 All in One SubCompact Board VIA Eden Series CPU with LAN Audio TV Out LVDS 2 COM Ports...
Страница 17: ...8 Gene 6310 User Manual Board Layout...
Страница 18: ...Chapter 1 General Information 9 Board Layout Reverse Side...
Страница 19: ...1 0 Gene 6310 User Manual Board Dimensions...
Страница 20: ...Chapter 1 General Information 11 Board Dimensions Reverse Side...
Страница 22: ...Chapter 2 Installation 13 Locating Jumpers Connectors...
Страница 23: ...1 4 Gene 6310 User ManualBC 599 596 Locating Jumpers Connectors Reverse side...
Страница 24: ...Chapter 2 Installation 15 Mechanical Drawing...
Страница 25: ...1 6 Gene 6310 User ManualBC 599 596 Mechanical Drawing Reverse...
Страница 84: ...Chapter 4 Driver Installation 75 4 Click Yes 5 Select Normally Install and then click Next...
Страница 85: ...Gene 6310 User Manual 76 6 Remain the default setting and then click Next 7 StillclickNext...