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SBC-411/411E User Manual
PCI Latency Timer (PCI Clocks)
This option sets the latency of all PCI devices on the PCI bus. The
settings are in units equal to PCI clocks. The settings are 32, 64,
96, 128, 160, 192, 224, or 248.
CPU to PCI Write Buffer
This option sets the write buffer between CPU and PCI bus.
Byte Merge
Set this option to Enabled to specify that the IDE controller will
transmit data in "Byte Merge" mode. This will improve the data
transmitting performance.
PCI IDE BusMaster
Set this option to Enabled to specify the IDE controller on the PCI
local bus has bus mastering capability. The settings are Disabled
or Enabled.
Offboard PCI IDE Card
This option specifies if an offboard PCI IDE controller adapter card
is used in the computer. You must also specify the PCI expansion
slot on the motherboard where the offboard PCI IDE controller card
is installed. If an offboard PCI IDE controller is used, the onboard
IDE controller on the motherboard is automatically disabled. The
settings are Auto, Slot1, Slot2, Slot3, Slot4, Slot5, or Slot6.
If Auto is selected, AMIBIOS automatically determines the correct
setting for this option.
Offboard PCI IDE Primary IRQ
This option specifies the PCI interrupt used by the primary IDE
channel on the offboard PCI IDE controller. The settings are
Disabled, INTA, INTB, INTC, INTD, or Hardwired.
Offboard PCI IDE Secondary IRQ
This option specifies the PCI interrupt used by the secondary IDE
channel on the offboard PCI IDE controller. The settings are
Disabled, INTA, INTB, INTC, INTD, or Hardwired.
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