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Chapter 3 – AMI BIOS Setup

Pico
-IT

X Bo

PIC
O

-A

PL4

3.7 Setup submenu: Boot

Options summary:
Quiet Boot

Disabled

Enabled

Optimal Default, Failsafe Default

EnableDisable showing boot logo.
Monitor Mwait

Disable

Enabled

Auto

Optimal Default, Failsafe Default

Enable/Disable Monitor Mwait. To install Linux OS, please set this item to disable.
Ipv4 PXE Support

Disabled

Optimal Default, Failsafe Default

Enabled

Enable Ipv4 PXE Boot Support. If disabled IPV4 PXE boot option will not be created.

Содержание PICO-APL4

Страница 1: ...Last Updated May 16 2018 PICO APL4 PICO ITX Board User s Manual 1st Ed...

Страница 2: ...this manual is intended to be accurate and reliable However the original manufacturer assumes no responsibility for its use or for any infringements upon the rights of third parties that may result f...

Страница 3: ...their respective owners Microsoft Windows is a registered trademark of Microsoft Corp ITE is a trademark of Integrated Technology Express Inc IBM PC AT PS 2 and VGA are trademarks of International Bu...

Страница 4: ...efore setting up your product please make sure the following items have been shipped Item Quantity PICO APL4 1 Product DVD with drivers 1 If any of these items are missing or damaged please contact yo...

Страница 5: ...ailed descriptions and explanations on the product s hardware and software features if any its specifications dimensions jumper connector settings definitions and driver installation instructions if a...

Страница 6: ...sient over voltage 7 Always disconnect this device from any AC supply before cleaning 8 While cleaning use a damp cloth instead of liquid or spray detergents 9 Make sure the device is installed near a...

Страница 7: ...ntrusion to the device iii Exposure to moisture iv Device is not working as expected or in a manner as described in this manual v The device is dropped or damaged vi Any obvious signs of damage displa...

Страница 8: ...sion if the battery is incorrectly replaced Replace only with the same or equivalent type recommended by the manufacturer Dispose of used batteries according to the manufacturer s instructions and you...

Страница 9: ...Preface IX Pico ITX Board PICO APL4 China RoHS Requirements CN AAEON Main Board Daughter Board Backplane Pb Hg Cd Cr VI PBB PBDE O SJ T 11363 2006 X SJ T 11363 2006...

Страница 10: ...l Ethers PBDE PCB Other Components O O O O O Wires Connectors for External Connections O O O O O O O The quantity of poisonous or hazardous substances or elements found in each of the component s part...

Страница 11: ...1 COM Port 2 CN1 13 2 4 2 COM Port 1 CN2 15 2 4 3 Front Panel Connector CN3 16 2 4 4 M 2 Key E Slot 2230 CN4 16 2 4 5 M 2 Key B Slot 2280 CN5 20 2 4 6 BIO Port Optional CN6 23 2 4 7 Digital I O CN7 2...

Страница 12: ...tup 44 3 1 System Test and Initialization 45 3 2 AMI BIOS Setup 46 3 3 Setup Submenu Main 47 3 4 Setup Submenu Advanced 48 3 4 1 Trusted Computing 49 3 4 2 CPU Configuration 51 3 4 3 SATA Configuratio...

Страница 13: ...67 Appendix A Watchdog Timer Programming 69 A 1 Watchdog Timer Registers 70 A 2 Watchdog Sample Program 71 Appendix B I O Information 74 B 1 I O Address Map 75 B 2 Memory Address Map 76 B 3 IRQ Mappi...

Страница 14: ...Pico ITX Board PICO APL4 Chapter 1 Chapter 1 Product Specifications...

Страница 15: ...2G Optional to 4G Max Memory Capacity Up to 4GB BIOS AMI SPI Wake On LAN Yes Watchdog Timer 255 levels Power Requirement 12V AT ATX Power Supply Type Lockable Phoenix Terminal co lay System Cooling H...

Страница 16: ...al eDP 3840x2160 60Hz Optional DDI Optional from BIO LCD Interface eDP I O Storage SATA 6 0Gb s x 1 5V Power reserved M 2 2280 B Key x 1 eMMC 16G optional to 32 64G Ethernet Realtek 8111G x 2 USB USB...

Страница 17: ...Pico ITX Board PICO APL4 Chapter 2 Chapter 2 Hardware Information...

Страница 18: ...Chapter 2 Hardware Information 5 Pico ITX Board PICO APL4 2 1 Dimensions Component Side Component Side...

Страница 19: ...Chapter 2 Hardware Information 6 Pico ITX Board PICO APL4 Solder Side Solder Side...

Страница 20: ...Chapter 2 Hardware Information 7 Pico ITX Board PICO APL4 Rear I O Configuration Phoenix DC Jack...

Страница 21: ...Chapter 2 Hardware Information 8 Pico ITX Board PICO APL4 2 2 Jumpers and Connectors Component Side Component Side...

Страница 22: ...Chapter 2 Hardware Information 9 Pico ITX Board PICO APL4 Solder Side Solder Side...

Страница 23: ...ico ITX Board PICO APL4 2 3 List of Jumpers Please refer to the table below for all of the board s jumpers that you can configure for your application Label Function JP1 Auto Power Button Enable Disab...

Страница 24: ...PICO APL4 2 3 1 Auto Power Button Enable Disable Selection JP1 Enable AT Default Disable ATX When disabled the power button of CN3 1 2 will be used to power on the system 2 3 2 Clear CMOS Jumper JP2 N...

Страница 25: ...COM Port 1 CN3 Front Panel Connector CN4 M 2 Key E Slot 2230 CN5 M 2 Key B Slot 2280 CN6 BIO Port Optional CN7 Digital I O CN8 SATA Port CN9 SPI Flash Programming Port CN10 5V Output for SATA HDD CN11...

Страница 26: ...ation 13 Pico ITX Board PICO APL4 2 4 1 COM Port 2 CN1 RS232 Pin Pin Name Signal Type Pin Name 1 DCD2 IN 2 DSR2 IN 3 RX2 IN 4 RTS2 OUT 5V 5 TX2 OUT 5V 6 CTS2 IN 7 DTR2 OUT 5V 8 RI2 5V 12V IN 5V 12V 9...

Страница 27: ...S485_D2 I O 5V 4 NC 5 NC 6 NC 7 NC 8 NC 5V 12V PWR 5V 12V 9 GND GND RS422 Pin Pin Name Signal Type Pin Name 1 RS422_TX2 OUT 5V 2 NC 3 RS422_TX2 OUT 5V 4 NC 5 RS422_RX2 IN 6 NC 7 RS422_RX2 IN 8 NC 5V 1...

Страница 28: ...Information 15 Pico ITX Board PICO APL4 1 2 3 4 5 6 7 8 9 2 4 2 COM Port 1 CN2 RS232 Pin Pin Name Signal Type Pin Name 1 DCD1 IN 2 DSR1 IN 3 RX1 IN 4 RTS1 OUT 9V 5 TX1 OUT 9V 6 CTS1 IN 7 DTR1 OUT 9V...

Страница 29: ...n Pin Name Pin Pin Name 1 PWR_BTN 2 PWR_BTN 3 HDD_LED 4 HDD_LED 5 SPEAKER 6 SPEAKER 7 PWR_LED 8 PWR_LED 9 H W RESET 10 H W RESET 2 4 4 M 2 Key E Slot 2230 CN4 Pin Pin Name Signal Type Signal Level 1 G...

Страница 30: ...Chapter 2 Hardware Information 17 Pico ITX Board PICO APL4 8 NC 9 NC 10 NC 11 NC 12 NC 13 NC 14 NC 15 NC 16 NC 17 NC 18 NC 19 NC 20 NC 21 NC 22 NC 23 NC 32 NC 33 GND GND 34 NC 35 PCIE_TX DIFF 36 NC...

Страница 31: ...F 38 NC 39 GND GND 40 NC 41 PCIE_RX DIFF 42 NC 43 PCIE_RX DIFF 44 NC 45 GND GND 46 NC 47 PCIE_REF_CLK DIFF 48 NC 49 PCIE_REF_CLK DIFF 50 NC 51 GND GND 52 PCIE_RST OUT 3 3V 53 PCIE_CLK_REQ IN 3 3V 54 W...

Страница 32: ...Hardware Information 19 Pico ITX Board PICO APL4 58 NC 59 NC 60 NC 61 NC 62 NC 63 GND GND 64 NC 65 NC 66 3 3VSB PWR 3 3V 67 NC 68 NC 69 GND GND 70 NC 71 NC 72 3 3VSB PWR 3 3V 73 NC 74 3 3VSB PWR 3 3V...

Страница 33: ...APL4 2 4 5 M 2 Key B Slot 2280 CN5 Pin Pin Name Signal Type Signal Level 1 GND GND 2 3 3V PWR 3 3V 3 GND GND 4 3 3V PWR 3 3V 5 GND GND 6 NC 7 USB_D DIFF 8 NC 9 USB_D DIFF 10 SSD_DAS IN 3 3V 11 NC 20 N...

Страница 34: ...formation 21 Pico ITX Board PICO APL4 28 NC 29 NC 30 NC 31 NC 32 NC 33 GND GND 34 NC 35 NC 36 NC 37 NC 38 DEVSLP OUT 1 8V 39 GND GND 40 NC 41 SATA_RX DIFF 42 NC 43 SATA_RX DIFF 44 NC 45 GND GND 46 NC...

Страница 35: ...2 Hardware Information 22 Pico ITX Board PICO APL4 49 SATA_TX DIFF 50 NC 51 GND GND 52 NC 53 NC 54 NC 55 NC 56 NC 57 GND GND 58 NC 59 NC 60 NC 61 NC 62 NC 63 GND GND 64 NC 65 NC 66 NC 67 NC 68 NC 69...

Страница 36: ...L4 70 3 3V PWR 3 3V 71 GND GND 72 3 3V PWR 3 3V 73 GND GND 74 3 3V PWR 3 3V 75 GND GND 2 4 6 BIO Port Optional CN6 Pin Pin Name Signal Type Signal Level 1 12VSB PWR 12V 2 GND GND 3 GND GND 4 PCIE_TXN0...

Страница 37: ...CIE_RXN1 DIFF 12 PCIE_TXP1 DIFF 13 PCIE_RXP1 DIFF 14 GND GND 15 GND GND 16 PS_ON OUT 17 DDI_DDCCLK I O 3 3V 18 DDI_DDCDATA I O 3 3V 19 5VSB PWR 5V 20 5VSB PWR 5V 21 5VSB PWR 5V 22 5VSB PWR 5V 23 PCIE_...

Страница 38: ...N DIFF 35 DDI_TX2N DIFF 36 DDI_TX3P DIFF 37 DDI_TX2P DIFF 38 GND GND 39 GND GND 40 DDI_HPD IN 5V 41 DDI_AUXN DIFF 42 GND GND 43 DDI0_AUXP DIFF 44 USB3_TX_N DIFF 45 GND GND 46 USB_D0 DIFF 47 USB3_TX_P...

Страница 39: ...OC IN 3 3V 59 5V PWR 5V 60 USB_OC IN 3 3V 61 5V PWR 5V 62 5V PWR 5V 63 5V PWR 5V 64 5V PWR 5V 65 LPC_AD0 I O 3 3V 66 LPC_FRAME IN 3 3V 67 LPC_AD1 I O 3 3V 68 SERIRQ I O 3 3V 69 LPC_AD2 I O 3 3V 70 NC...

Страница 40: ...apter 2 Hardware Information 27 Pico ITX Board PICO APL4 2 4 7 Digital I O CN7 Pin Pin Name Signal Type Signal Level 1 5V PWR 5V 2 DIO0 I O 5V 3 DIO1 I O 5V 4 DIO2 I O 5V 5 DIO3 I O 5V 6 GND GND 1 5 2...

Страница 41: ...Hardware Information 28 Pico ITX Board PICO APL4 2 4 8 SATA Port CN8 Pin Pin Name Signal Type Signal Level 1 GND GND 2 SATA_TX DIFF 3 SATA_TX DIFF 4 GND GND 5 SATA_RX DIFF 6 SATA_RX DIFF 7 GND GND Pi...

Страница 42: ...ico ITX Board PICO APL4 2 4 9 SPI Flash Programming Port CN9 Pin Pin Name Signal Type Signal Level 1 SPI_MISO OUT 2 GND GND 3 SPI_CLK IN 4 3 3VSB PWR 3 3V 5 SPI_MOSI IN 6 SPI_CS IN 7 NC P IN 1 P IN 2...

Страница 43: ...ATA HDD CN12 Pin Pin Name Signal Type Signal Level 1 5V PWR 5V 2 GND GND 2 4 11 HDMI Port CN11 Pin Pin Name Signal Type Signal level 1 TMDS_DAT2 DIFF 2 GND GND 3 TMDS_DAT2 DIFF 4 TMDS_DAT1 DIFF 5 GND...

Страница 44: ...Pin Pin Name Signal Type Signal level 10 TMDS_CLK DIFF 11 GND GND 12 TMDS_CLK DIFF 13 NC 14 NC 15 DDC_CLK I O 5V 16 DDC_DATA I O 5V 17 GND GND 18 5V I O 5V 19 HPLG_DETECT IN 2 4 12 Battery CN12 Pin P...

Страница 45: ...mation 32 Pico ITX Board PICO APL4 2 4 13 LAN RJ 45 Port1 CN13 Pin Pin Name Signal Type Signal level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF 7 MDI3 DIFF 8 MDI3 DIFF 1 A...

Страница 46: ...mation 33 Pico ITX Board PICO APL4 1 ACT LINK LED SPEED LED 8 2 4 14 LAN RJ 45 Port2 CN14 Pin Pin Name Signal Type Signal Level 1 MDI0 DIFF 2 MDI0 DIFF 3 MDI1 DIFF 4 MDI2 DIFF 5 MDI2 DIFF 6 MDI1 DIFF...

Страница 47: ...Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB0_D DIFF 3 USB0_D DIFF 4 GND GND 5 USB0_SSRX DIFF 6 USB0_SSRX DIFF 7 GND GND 8 USB0_SSTX DIFF 9 USB0_SSTX DIFF 10 5VSB PWR 5V 11 USB1_D DIFF 12 USB...

Страница 48: ...al Level 15 USB1_SSRX DIFF 16 GND GND 17 USB1_SSTX DIFF 18 USB1_SSTX DIFF 2 4 16 External Power Input CN17 Pin Pin Name Signal Type Signal Level 1 VIN PWR 12V 2 GND GND 2 4 17 12V DC Power Jack Option...

Страница 49: ...n Name Signal Type Signal Level 1 12V PWR 12V 2 12V PWR 12V 3 GND GND 4 GND GND 5 EDP_TX2_N DIFF 6 EDP_TX2_P DIFF 7 GND GND 8 EDP_TX1_N DIFF 9 EDP_TX1_P DIFF 10 GND GND 11 EDP_TX0_N DIFF 12 EDP_TX0_P...

Страница 50: ...ESS OUT 3 3V 21 NC 22 EDP_BKLTEN OUT 3 3V 23 EDP_HPD IN 24 GND GND 25 GND GND 26 GND GND 27 12V PWR 12V 28 12V PWR 12V 29 12V PWR 12V 30 12V PWR 12V 2 4 19 USB 2 0 Port 2 CN20 Pin Pin Name Signal Type...

Страница 51: ...N21 Pin Pin Name Signal Type Signal Level 1 5VSB PWR 5V 2 USB_D DIFF 3 USB_D DIFF 4 GND GND 2 4 21 LPC Port CN22 Pin Pin Name Signal Type Signal Level 1 LAD0 I O 3 3V 2 LAD1 I O 3 3V 3 LAD2 I O 3 3V 1...

Страница 52: ...hapter 2 Hardware Information 39 Pico ITX Board PICO APL4 4 LAD3 I O 3 3V 5 3 3V PWR 3 3V 6 LFRAME IN 7 LRESET OUT 3 3V 8 GND GND 9 LCLK OUT 10 I2C0_SDA I O 3 3V 11 I2C0_SCL OUT 3 3V 12 SERIRQ I O 3 3...

Страница 53: ...nal Name Rate Output COM Port 2 CN1 5V 12V 5V 0 5A or 12V 0 5A M 2 Key E Slot 2230 CN4 3 3VSB 3 3V 2A M 2 Key B Slot 2280 CN5 3 3V 3 3V 2 5A Digital IO Port CN7 5V 5V 1A 5V Output for SATA HDD CN10 5V...

Страница 54: ...Chapter 2 Hardware Information 41 Pico ITX Board PICO APL4 2 6 Function Block...

Страница 55: ...Chapter 2 Hardware Information 42 Pico ITX Board PICO APL4 2 7 Assembly Options 2 7 1 PICO APL4 HSK01...

Страница 56: ...Chapter 2 Hardware Information 43 Pico ITX Board PICO APL4 2 7 2 PICO APL4 HSP01...

Страница 57: ...Pico ITX Board PICO APL4 Chapter 3 Chapter 3 AMI BIOS Setup...

Страница 58: ...MOS memory and BIOS NVRAM If system configuration is not found or system configuration data error is detected system will load optimized default and re boot with this default system configuration auto...

Страница 59: ...at it retains the Setup information when the power is turned off Entering Setup Power on the computer and press Del or ESC immediately This will allow you to enter Setup Main Set the date use tab to s...

Страница 60: ...Chapter 3 AMI BIOS Setup 47 Pico ITX Board PICO APL4 3 3 Setup Submenu Main...

Страница 61: ...Chapter 3 AMI BIOS Setup 48 Pico ITX Board PICO APL4 3 4 Setup Submenu Advanced...

Страница 62: ...CG EFI protocol and INT1A interface will not be available SHA 1 PCR Bank Disable Enable Optimal Default Failsafe Default Enable or Disable SHA 1 PCR Bank SHA256 PCR Bank Disable Enable Optimal Default...

Страница 63: ...y Disabled Enabled Optimal Default Failsafe Default Enable or Disable Endorsement Hierarchy TPM2 0 UEFI Spec Version TCG_1_2 TCG_2 Optimal Default Failsafe Default Select the TCG2 Spec Version Support...

Страница 64: ...Optimal Default Failsafe Default Enable Disable Intel SpeedStep Turbo Mode Disabled Enabled Optimal Default Failsafe Default Turbo Mode Intel Virtualization Technology Disabled Enabled Optimal Default...

Страница 65: ...Chapter 3 AMI BIOS Setup 52 Pico ITX Board PICO APL4 Power Limit 1 Enable Disabled Optimal Default Failsafe Default Enabled Enable Disable Power Limit 1...

Страница 66: ...to 3Gb s supported per port Port 0 Disabled Enabled Optimal Default Failsafe Default Enable or Disable SATA Port SATA Port 0 Hot Plug Capability Disabled Optimal Default Failsafe Default Enabled If en...

Страница 67: ...Chapter 3 AMI BIOS Setup 54 Pico ITX Board PICO APL4 3 4 4 Hardware Monitor...

Страница 68: ...Chapter 3 AMI BIOS Setup 55 Pico ITX Board PICO APL4 3 4 5 SIO Configuration...

Страница 69: ...his Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 3F8h IRQ 4 IO 2F8h IRQ 3 Allows use...

Страница 70: ...his Device Disable Enable Optimal Default Failsafe Default Enable or Disable this Logical Device Possible Use Automatic Settings Optimal Default Failsafe Default IO 2F8h IRQ 3 IO 3F8h IRQ 4 Allows use...

Страница 71: ...58 Pico ITX Board PICO APL4 3 4 5 Digital IO Port Configuration Options summary DIO Port Output Input Set DIO as Input or Output Output Level High Optimal Default Failsafe Default Low Set output leve...

Страница 72: ...Mode ATX Type Optimal Default Failsafe Default AT Type Select system power mode Restore AC Power Loss Last State Optimal Default Failsafe Default Always On Always Off RTC wake system from S5 Disable O...

Страница 73: ...Chapter 3 AMI BIOS Setup 60 Pico ITX Board PICO APL4 3 5 Setup submenu Chipset...

Страница 74: ...Chapter 3 AMI BIOS Setup 61 Pico ITX Board PICO APL4 3 5 1 North Bridge...

Страница 75: ...Disable Enable Optimal Default Failsafe Default Auto Control the PCI Express Root Port AUTO To disable unused root port automatically for the most optimum power savings Enable Enable PCIe root port D...

Страница 76: ...light these items and press Enter a dialog box appears which lets you enter a password You can enter no more than six letters or numbers Press Enter after you have typed in the password A second dialo...

Страница 77: ...afe Default EnableDisable showing boot logo Monitor Mwait Disable Enabled Auto Optimal Default Failsafe Default Enable Disable Monitor Mwait To install Linux OS please set this item to disable Ipv4 PX...

Страница 78: ...Chapter 3 AMI BIOS Setup 65 Pico ITX Board PICO APL4 3 8 Setup submenu Exit...

Страница 79: ...Pico ITX Board PICO APL4 Chapter 4 Chapter 4 Drivers Installation...

Страница 80: ...nce below to install the drivers Step 1 Install Chipset Driver 1 Open the STEP1 CHIPSET folder and open the SetupChipset exe file 2 Follow the instructions 3 Drivers will be installed automatically St...

Страница 81: ...Open the STEP5 TXE folder and open the SetupTXE exe file 2 Follow the instructions 3 Driver will be installed automatically Step 6 Install FintekSerial_Patch_T4R8 Driver 1 Open the STEP6 FintekSerial_...

Страница 82: ...Pico ITX Board PICO APL4 Appendix A Appendix A Watchdog Timer Programming...

Страница 83: ...nable Disable time out output via WDTRST 0 Disable 1 Enable Pulse Width 0x05 0 1 01 Width of Pulse signal 00 1ms do not use 01 25ms 10 125ms 11 5s Pulse width is must longer then 16ms Signal Polarity...

Страница 84: ...r define PSWidthBit 0x00 WDTRST Pulse width Bit0 1 define PSWidthVal 0x01 25ms for WDTRST pulse define PolarityBit 0x02 WDTRST Signal polarity Bit2 define PolarityVal 0x00 Low active for WDTRST define...

Страница 85: ...DTEnable VOID AaeonWDTEnable WDTEnableDisable 1 Procedure AaeonWDTConfig VOID AaeonWDTConfig byte Counter BOOLEAN Unit Disable WDT counting WDTEnableDisable 0 Clear Watchdog Timeout Status WDTClearTim...

Страница 86: ...s 25ms WDTSetBit TimerReg PSWidthBit PSWidthVal Watchdog WDTRST Enable WDTSetBit DevReg WDTRstBit WDTRstVal VOID WDTClearTimeoutStatus WDTSetBit TimerReg StatusBit 1 VOID WDTWriteByte byte Register by...

Страница 87: ...Pico ITX Board PICO APL4 Appendix B Appendix B I O Information...

Страница 88: ...Appendix B I O Information 75 Pico ITX Board PICO APL4 B 1 I O Address Map...

Страница 89: ...Appendix B I O Information 76 Pico ITX Board PICO APL4 B 2 Memory Address Map...

Страница 90: ...Appendix B I O Information 77 Pico ITX Board PICO APL4 B 3 IRQ Mapping Chart...

Страница 91: ...Appendix B I O Information 78 Pico ITX Board PICO APL4...

Страница 92: ...Appendix B I O Information 79 Pico ITX Board PICO APL4...

Страница 93: ...Pico ITX Board PICO APL4 Appendix C Appendix C Mating Connectors...

Страница 94: ...ble 1701090122 CN3 Front Panel Connector JCTC 11002H00 5 2P N A N A CN7 Digital I O Connector Harwin M50 3000345 N A N A CN8 SATA Connector Molex 887505318 SATA Cable 1709070500 CN10 5Vout Connector J...

Страница 95: ...Appendix C Mating Connectors 82 Pico ITX Board PICO APL4 Connector CN22 LPC Connector JST SHR 12V S B AAEON LPC Cable 1703120130...

Страница 96: ...Pico ITX Board PICO APL4 Appendix D Appendix D DIO...

Страница 97: ...L4 provides one serial access interface I2C Bus to read write internal registers The address of Serial Bus is 0x6E 0110_1110 The related register for configuring DIO is list as follows Configuration a...

Страница 98: ...PICO APL4 The following is a sample code for 8 input MODEL SMALL CODE begin mov cl 01h mov al 80h call CT_I2CWriteByte call Delay5ms mov al 00h mov cl 20h call CT_I2CWriteByte mov cl 22h call CT_I2CR...

Страница 99: ...it Slave Address Register inc ch Set the slave address and mov al ch prepare for a READ command out dx al mov dx F040h 05h Host Command Register mov al cl offset to read out dx al mov dx F040h 06h xor...

Страница 100: ...x F040h 00h Host Control Register xor al al Clear previous commands out dx al call Delay5ms mov dx F040h 04h Transmit Slave Address Register mov al ch Set the slave address and out dx al prepare for a...

Страница 101: ...dp Wait until the busy bit clears indicating that the SMBUS activity has concluded CT_Chk_SMBus_Ready Proc Near mov dx F040h 01h Host Status Register Check_I2C_ByteRead_ForBusy in al dx test al 08h jn...

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