Chapter 3 Award BIOS Setup
6241 Mainboard
Video BIOS Cacheable
Selecting Enabled allows the caching of the video BIOS
ROM at F0000h-FFFFFh, resulting in better system performance. However, if any
program writes to this memory area, a system error may result.
Video RAM Cacheable
Selecting Enabled allows the caching of the video RAM,
resulting in better system performance. However, if any program writes to this
memory area, a system error may result.
8 Bit I/O Recovery Time
The recovery time is the length of time, measured in CPU
clocks, which the system will be delayed after the completion of an I/O request. This
delay takes place because the CPU is operating so much faster than the input/output
bus that the CPU must be delayed to allow for the completion of the I/O. This item
allows you to determine the recovery time allowed for 8- bit I/O. Choices are from
NA, 1 to 8 CPU clocks.
16 Bit I/O Recovery Time
This item allows you to determine the recovery time
allowed for 16-bit I/O. Choices are from NA, 1 to 4 CPU clocks.
Memory Hole At 15M-16M
In order to improve performance, certain space in
memory can be reserved for ISA cards. This memory must be mapped into the
memory below 16MB.
Passive Release
When Enabled, CPU to PCI bus accesses are allowed during passive
release. Otherwise, the arbiter only accepts another PCI master access to local
DRAM. The choice : Enabled, disabled.
Delayed Transaction
This chipset has an embedded 32-bit posted write buffer to
support deadly transactions cycles. Select Enabled to support compliance with PCI
specification version 2.1. The choice : Enabled, disabled space
AGP Aperture Size (MB)
Select the size of the AGP aperture. The aperture is a
portion of the PCI memory address range dedicated for graphics memory address
space. Host cycle that hit the aperture range are forwarded to the AGP without any
translation. The choice 4, 8, 16, 32, 64, 128, 256.
EDO Auto Configuration
The first chipset settings deal with CPU access to
dynamic random access memory (DRAM). The default timings have been carefully
chosen and should only be altered if data is being lost. Such a scenario might well
occur if your system had mixed speed DRAM chips installed so that greater delays
may be required to preserve the integrity of the data held in the slower memory chips.
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