Research & Development
NVRAM EEPROM interface (2
pins)
24C02 type 2K bits serial EEPROM is used to
store the modem configuration profiles and
telephone numbers. One user defined profile and
four telephone numbers can be saved in this
EEPROM. Two pins are used to interface with
24C02. One pin is used as serial clock output pin;
the other pin has an open drain output with pullup
resistor used for both serial data in and out.
●
SCLK: Serial clock output for 24C02 type
EEPROM. Connect this pin to the EEPROM's
SCL pin. (3.3V output)
●
SDAT: Bi-directional data signal for 24C02 type
EEPROM. Connect this pin to the EEPROM's
SDA pin. (3.3V bi-directional I/O)
Program memory interface
The program memory needed for ZyDAS USB
modem solution is 4M bits. This memory device
can be flash EPROM, EPROM or ROM. It is
connected to the 16-bit low speed data bus of
ZD1051. The access time is 120 nsec. The
program memory interface is:
●
A[17:0]: Address bus lines. (3.3V output)
●
DL[15:0]: The low speed data bus lines. (3.3V
I/O)
●
FECE1#: Chip select (enable) signal output for
connection to external FEPROM/ EPROM/
ROM device's CE# pin. (3.3V output, active
low)
●
EPRD#: Read strobe (output enable) signal
output for external FEPROM/ EPROM/ ROM
device. Connect it to the external device's OE#.
(3.3V output, active low)
Note:
ZyDAS modem code supports on-chip
FEPROM programming capability. Most of the
bottom-boot FEPROM can be used. Currently
Intel 28F400/28F800 and AMD 29F400/29F800
are supported.
The additional FEPROM interface for 28F400 is:
●
EPWR#: Write strobe signal output for
FEPROM device. Connect it to the FEPROM's
WE# pin (3.3V output, active low)
●
WP#: Write protect signal for FEPROM device.
Connect it to the FEPROM's WP# pin. (3.3V
output, active low)
●
VPP#: Control the supply power for FEPROM
program and erase operation. (3.3V output,
active low)
The additional FEPROM interface signal needed
for programming and erasing AMD 29F400 is
only EPWR#.
Data memory interface
The data memory interface is used to interface
high speed SRAM. ZyDAS USB modem needs a
1M bits 12 nsec SRAM. This SRAM is connected
to the high speed data bus of ZD1051.
●
A [17:0]: Address bus lines are the same as
program memory address bus A[17:0]. (3.3V
output)
●
DH[15:0]: The high speed data bus lines (3.3V
I/O)
●
SRAMS#: SRAM chip select signal output for
external high speed SRAM. Connect to
an SRAM's CE# pin. (3.3V output, active low)
●
SRAMR#: SRAM output enable signal output
for external high speed SRAM. Connect
to an SRAM's OE# pin. (3.3V output, active
low)
●
SRAMW#: SRAM write strobe signal output for
external high speed SRAM. Connect to an
SRAM's WE# pin. (3.3V output, active low)
Serial device interface (6 pins)
This serial interface is used to connect external
silicon DAA. Silicon Lab Si3034/Si3035 silicon
DAA can be connected to the ZD1051 through
this serial interface.
●
CKPLL: 6.144 MHz master clock output to the
front end chip. To be connected to the Si3034/
Si3035's MCLK pin. (3.3V output)
●
CLKR1: DSP serial data clock input pin.
Connects to the SCLK pin of Si3034/ Si3035.
(3.3V input)
●
FSR1#: Frame sync input pin for DSP serial
port. Connects to the FSYNC# pin of Si3034/
Si3035. (3.3V input)
●
DR1: Data input pin for DSP serial port.
Connects to the SDO pin of Si3034/ Si3035.
(3.3V input)
●
DX1: Data output pin for DSP serial port.
Connects to the SDI pin of Si3034/ Si3035.
(3.3V output)
●
RGDT#: The ring detection input, it is
connected to pin RGDT# of Silicon DAA
Si3034/ Si3035. (3.3V input, active low)
Package and pin assignments
ZD1051 is in a 128-pin TQFP package. Please
refer to Figure 3 for the physical dimension
description. The pin assignments are shown in
Table 1.
Electrical characteristic
Please refer to Table 2.
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Revision 1.0
2003/6 From 3JTech
