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C
HAPTER
1: I
NTRODUCTION
PCI Technology
The PCI local bus is a high-performance bus that provides a
processor-independent data path between the CPU in a PC and
high-speed peripherals. This interconnect mechanism is
designed specifically to accommodate multiple high-
performance peripheral devices that support networking and
disk subsystems, graphics, full-motion video, and multimedia.
The PCI specification defines two types of PCI devices: a target
and a master. A target is a device that accepts commands and
responds to the requests of a master. The Fast Ethernet PCI T4
adapter is a bus master device that can transfer information
directly to system memory without interrupting the system
processor.
The PCI specification supports the following:
■
High performance.
The PCI bus runs at a clock speed of
33 MHz and employs a 32-bit data bus that supports multiple
peripheral components and add-on cards at a peak bandwidth
of 132 Mbps, up to an order of magnitude greater than that of
other PC buses (ISA, EISA, or MCA).
■
Automatic configuration.
A PCI adapter has configuration
specifications set in on-board memory and provides installation
information to the computer at start-up.
■
Shared slots.
The PCI specification calls for “shared slots,”
which denotes the shared expansion backplate slot. This shared
backplate slot provides access to one of two types of adapters:
a PCI adapter and an ISA adapter, for example, or a PCI adapter
and an EISA adapter. Only one adapter at a time can be
installed in a shared slot. Manufacturers are currently producing
computers that support the PCI bus in conjunction with
conventional ISA and EISA buses in the same chassis.
For detailed information about the PCI local bus, consult the
PCI specification.
