Sangoma S503 Hardware Interface Manual Download

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December 2001

FRAME RELAY SUPPORT FOR

SANGOMA CARDS

Hardware Interface Manual

Summary of Contents for S503

Page 1: ...December 2001 FRAME RELAY SUPPORT FOR SANGOMA CARDS Hardware Interface Manual...

Page 2: ...Licensee shall not use copy modify or transfer the Program or documentation or any copy modification or merged portion in whole or in part except as expressly provided for in this license If the Lice...

Page 3: ...re solution handles the link Information Rates and local signalling autonomously without PC intervention The PC accesses the system as required to send or receive data configure the link or to obtain...

Page 4: ...2001 Page 4 of 78 Conventions used in this manual Programming conventions used are as follows Variables described with an 0x prefix or an h suffix are hexadecimal values All other variables are decim...

Page 5: ...Jumper JP1 Do not change without consulting your Sangoma dealer I O port address This is set by Jumper JP3 Pins 5 6 Pins 3 4 Pins 1 2 I O Address Selection Not Jumpered Jumpered Jumpered 250 252 Hex J...

Page 6: ...JP3 Pins 9 10 Interface Level Jumpered RS 232 Not Jumpered V 35 S514 PCI card No jumpers need to be set on this card as it is configured by the PC BIOS S508 ISA Card Jumpers JP1 on the S508 define th...

Page 7: ...ack to back cable is used The generated line speed is set by software However the cards have a very large configurable range and therefore cannot easily be tabulated When asked for the line speed duri...

Page 8: ...ngoma Technologies Inc 1999 2000 2001 Page 8 of 78 18 TXA 19 TXB 20 RXA 21 RXB 22 TX Clock A 23 TX Clock B 24 RX Clock A 25 RX Clock B 26 DTR A V 11 27 DTR B V 11 28 TXA 29 TXB 30 RXA 31 RXB 32 TX Clo...

Page 9: ...3 RxD 7 GND 4 RTS 5 CTS 20 DTR 6 DSR 8 DCD 15 TxC 17 RxC 24 BxC V 35 X 21 Pin Function 4 RTS 5 CTS 6 DSR 7 GND 8 DCD 10 TxA 9 TxB 12 RxA 11 RxB 19 Tx Clock A 20 DTR V10 signal 13 DTRA V11 signal 14 DT...

Page 10: ...ftware by completing the required parameters within the control block defined below and then setting the OPP_FLAG The SDLA processor will carry out the defined command and then update this control blo...

Page 11: ...cessor when the COMMAND has been completed COMMAN D 01H 1 Command code BUFFER_ LENGTH 02H 2 Length of the data buffer associated with this call RETURN_ CODE 04H 1 Result of the previous command DLCI 0...

Page 12: ...0x14 READ_DLC_STATUS 0x15 READ_DLC_STATISTICS 0x16 FLUSH_DLC_STATISTICS 0x17 LIST_ACTIVE_DLCIs 0x18 FLUSH_INFORMATION_BUFFERS 0x20 ADD_DLCIs 0x21 DELETE_DLCIs 0x22 ACTIVATE_DLCs 0x23 DEACTIVATE_DLCs 0...

Page 13: ...mitted in a single Tc interval FECN_BECN_ DE_CR_BITS The status of the FECN BECN DE and C R bits to be set in the transmitted I frame represented by bits 3 2 1 and 0 respectively If the Discard Eligib...

Page 14: ...ncluded in the DLCIs listed in the SET_DLCI_CONFIGURATION command 0x05 The BUFFER_LENGTH set by the application exceeded the maximum I frame length defined by the SET_DLCI_CONFIGURATION command The BU...

Page 15: ...0 0x11 0x12 0x13 0x14 0x1F See Section Notes on Return Codes for further details DATA valid if a RETURN_CODE of 0x00 is received Offset 0x00 0x04 a pointer to the Transmit Status Element to be used fo...

Page 16: ...l Status Enquiry or a Link Verification Enquiry message Control Block values to be set on entry BUFFER_ LENGTH Set to 0x01 DATA Offset 0x00 indicates the type of Status Enquiry to be issued 0x02 issue...

Page 17: ...ers to all DLCIs listed Thereafter if desired each DLCI may be individually configured by using the SET_DLCI_CONFIGURATION command with the DLCI set to a specific non zero value The use of this comman...

Page 18: ...s limit If the station is configured as an Access Node then all I frames received in excess of the CIR will have the DE Discard Eligibility bit automatically set before passing to the application Bit...

Page 19: ...ons have been enabled Bits 13 14 the transmit receive buffer ratios as follows If bits 13 and 14 are reset then the transmit receive buffer ratio is 50 50 If bit 13 is set and bit 14 is reset then the...

Page 20: ...CPE Offset 0x0C the T392 Polling Verification timer Valid entries are from 5 to 30 seconds and only pertain to a station configured as an Access Node Offset 0x0E the N391 Full Status Polling Cycle co...

Page 21: ...d values are between 1 and 512 kbits Offset 0x1E the backward Excess Burst Size Be bwd This is the maximum amount of uncommitted data generated at the remote station in kbits that the network will att...

Page 22: ...red in a transmit buffer if there is a buffer available irrespective of the current transmit throughput Bits 4 15 reserved Offset 0x02 the forward Committed Information rate CIR fwd for this DLCI Vali...

Page 23: ...0x06 A configuration parameter was out of the valid range The BUFFER_LENGTH indicates the offset within the DATA area of the invalid parameter 0x07 The configured Bc plus Be is greater than the permi...

Page 24: ...2000 2001 Page 24 of 78 DATA valid if a RETURN_CODE of 0x00 is received Offset 0x00 0x01 if internal clocking has been selected then the actual generated baud rate may be different from the configure...

Page 25: ...configuration or set to a specific DLCI to read the configuration of that particular connection BUFFER_ LENGTH set to 0x00 Control Block values set on return RETURN_ CODE 0x00 The action has been per...

Page 26: ...or the SET_DLCI_CONFIGURATION non zero DLCI described above with the following additions all parameters are 2 byte unsigned values Offset 0x0E the forward Committed Rate Measurement Interval Tc fwd in...

Page 27: ...mes or to respond to incoming frames Note that this command must be executed before using the SET_DLCI_CONFIGURATION command on DLCI zero Control Block values to be set on entry BUFFER_ LENGTH Set to...

Page 28: ...r down loading the code to the adapter the communications may not be enabled until the initial SET_DLCI_CONFIGURATION DLCI zero command has been issued Control Block values to be set on entry BUFFER_...

Page 29: ...to a specific DLCI to read the status of that particular connection BUFFER_ LENGTH set to 0x00 Control Block values set on return RETURN_ CODE 0x00 The action has been performed successfully 0x04 An...

Page 30: ...tatus of that DLCI as follows Bit 0 if set the DLCI has been deleted Bit 1 if set then the DLCI is active and information transfer is possible Bit 2 if set then the Access Node is waiting to issue a F...

Page 31: ...to 0x01 DATA Offset 0x00 only valid for a non zero DLCI setting as follows Set to 0x00 the throughput statistics are not passed to the application Set to 0x01 calculate and pass the throughput statis...

Page 32: ...itted and discarded after a non DLCI specific transmit interrupt as the CIR would have been exceeded by the transmission of this frame 0x04 number of frames received of invalid length 0x06 number of I...

Page 33: ...grity Verification Status messages sent pertains to an Access Node only 0x1C number of received In channel Signalling frames discarded due to a format error 0x1E number of unsolicited responses from t...

Page 34: ...g values and pertain only to the specified DLCI Offset Parameter Meaning 0x00 number of Information frames transmitted 0x04 number of Information bytes transmitted 0x08 number of Information frames re...

Page 35: ...ility DE indicator set 0x20 the current transmit throughput bps 0x24 the number of milliseconds expired since the transmit throughput measurement was activated by the first outgoing I frame 0x28 the c...

Page 36: ...0 to flush the global statistics or to flush the statistics for all the configured DLCIs or set to a specific DLCI to flush the performance statistics of a particular connection BUFFER_ LENGTH Set to...

Page 37: ...37 Frame Relay for Sangoma Cards C Sangoma Technologies Inc 1999 2000 2001 Page 37 of 78 0x10 0x11 0x12 0x13 0x14 0x1F See Section Notes on Return Codes for further details...

Page 38: ...Is has been reported to the CPE by means of a transmitted Full Status message Control Block values to be set on entry BUFFER_ LENGTH Set to 0x00 Control Block values set on return RETURN_ CODE 0x00 Th...

Page 39: ...then only the transmit buffers for that DLCI are flushed no buffered received Information frames are cleared Control Block values to be set on entry DLCI Set to 0x00 to flush all transmit and receive...

Page 40: ...e added Each DLCI is represented by a 2 byte unsigned hexadecimal value and a maximum of 100 DLCIs may be listed Note that these DLCIs must have been defined in the SET_DLCI_CONFIGURATION command Cont...

Page 41: ...CIs to be deleted Each DLCI is represented by a 2 byte unsigned hexadecimal value and a maximum of 100 DLCIs may be listed Note that these DLCIs must have been previously added by using the ADD_DLCIs...

Page 42: ...0xNN a list of all DLCIs to be activated Each DLCI is represented by a 2 byte unsigned hexadecimal value and a maximum of 100 DLCIs may be listed Note that DLCIs must have been added before being act...

Page 43: ...f DLCIs to deactivate DATA Offset 0x00 0xNN a list of all DLCIs to be deactivated Each DLCI is represented by a 2 byte unsigned hexadecimal value and a maximum of 100 DLCIs may be listed Control Block...

Page 44: ...0 Control Block values set on return RETURN_ CODE 0x00 The action has been performed successfully 0x10 0x11 0x12 0x13 0x14 See Section Notes on Return Codes for further details BUFFER_LENGTH valid if...

Page 45: ...ues to be set on entry BUFFER_ LENGTH Set to 0x01 DATA Offset 0x00 defines the DTR and RTS settings If bit 0 is set then DTR will be set high If bit 1 is set then RTS will be set high Control Block va...

Page 46: ...t to 0x00 Control Block values set on return RETURN_ CODE 0x00 The action was performed successfully 0x10 0x11 0x12 0x13 0x14 See Section Notes on Return Codes for further details BUFFER_ LENGTH valid...

Page 47: ...ceiver had to be disabled due to inadequate receive buffering Offset 0x04 reserved for later use Offset 0x05 number of abort frames transmitted Offset 0x06 number of missed transmit underrun interrupt...

Page 48: ...values of the variables accessed by the READ_COMMS_ERR_STATS command are reset to zero Control Block values to be set on entry BUFFER_ LENGTH Set to 0x00 Control Block values set on return RETURN_ COD...

Page 49: ...H Set to 0x00 Control Block values set on return RETURN_ CODE 0x00 The action has been performed successfully 0x10 0x11 0x12 0x13 0x14 See Section Notes on Return Codes for further details BUFFER_ LEN...

Page 50: ...rames then this may result in the receiver on the adapter being temporarily disabled to avoid buffer overruns Therefore the application may wish to temporarily discard incoming I frames if the host PC...

Page 51: ...rames which are received Control Block values to be set on entry BUFFER_ LENGTH Set to 0x01 DATA Offset 0x00 is set as follows 0x00 do not bridge the transmitter and receiver 0x01 bridge the transmitt...

Page 52: ...it interrupt where an interrupt will be triggered if an Information frame of a specified length may be transmitted on a specific DLCI The length of the frame to be transmitted is defined at offset 0x0...

Page 53: ...nly applicable when enabling transmit interrupts in the DLCI specific mode the length of the outgoing frame for which a transmit interrupt should be triggered Note that this parameter is represented b...

Page 54: ...Page 54 of 78 0x06 only applicable when enabling transmit interrupts the length of the frame to be transmitted exceeded the maximum number of bytes which may be transmitted in a single Tc interval 0x1...

Page 55: ...command Control Block values to be set on entry BUFFER_ LENGTH Set to 0x00 Control Block values set on return RETURN _CODE 0x00 The action has been performed successfully 0x10 0x11 0x12 0x13 0x14 See...

Page 56: ...expectedly low 0x02 CTS was found to be unexpectedly low 0x11 A change in the channel status occurred the channel moved from operative to being inoperative 0x12 A change in the channel status occurred...

Page 57: ...when performing the original SET_DLCI_CONFIGURATION command DLCI zero The user should reconfigure the frame relay code to include these additional DLCIs or contact the network provider to establish th...

Page 58: ...th a command such as a READ_DLC_STATUS to recover the exception return code of 0x10 0x11 0x12 0x13 or 0x14 The EXCEPTION_CONDITION_INTERFACE_BYTE is as follows If bit 0 is set then the channel status...

Page 59: ...O base port register may be read to reflect the status of the frame relay code as follows If bit 0 is set then there is at least one received Information frame queued for reception by the application...

Page 60: ...a frame may now be passed by the application to the adapter for transmission See Section 9 under Transmitting Information Frames for further details If bit 2 is set then an interrupt has been trigger...

Page 61: ...the INTERRUPT_PERMISSION_BYTE at offset 0xF011 on the adapter The interrupt bit map for the INTERRUPT_PERMISSION_BYTE is the same as that used for the SET_INTERRUPT_TRIGGERS command i e bit 0 is used...

Page 62: ...er to be able to access various areas of adapter memory The 8K window is adjusted by writing a specified value out to the port address adapter base I O port 2 as follows Value to be written to I O bas...

Page 63: ...x28000 0x29FFF 0x15 0x2A000 0x2BFFF 0x16 0x2C000 0x2DFFF 0x17 0x2E000 0x2FFFF 0x18 0x30000 0x31FFF 0x19 0x32000 0x33FFF 0x1A 0x34000 0x35FFF 0x1B 0x36000 0x37FFF 0x1C 0x38000 0x39FFF 0x1D 0x3A000 0x3B...

Page 64: ...tus Elements and various buffer configuration parameters must be read after the initial SET_DLCI_CONFIGURATION has been performed The buffer configuration information is as follows Parameter Definitio...

Page 65: ...2 1 and 0 respectively 1 0x05 Reserved 6 0x06 Pointer to the actual received I frame data area 4 0x0C These Receive Status Element are used sequentially as Information frames are received by the adapt...

Page 66: ...K memory segment access is adjusted and step b is repeated It is important to note that the receive buffer is a rotational buffer and so the base and end addresses of this buffer are made available to...

Page 67: ...gured as follows Parameter Definition Lengt h Offset Within Transmit Status Element Status flag 1 0x00 Reserved 4 0x01 Length of I frame data field 2 0x05 DLCI on which the I frame is to be transmitte...

Page 68: ...mailbox data area 3 The pointer to the I frame data area is read from this Transmit Status Element and the data to be transmitted is written to the adapter as follows a The 8K memory window is set to...

Page 69: ...is used to enable transmit interrupts and to define the type of transmit interrupt to be generated DLCI or non DLCI specific interrupts 2 Once a transmit interrupt occurs the application reads the fo...

Page 70: ...he status flag should be set to 0x90 Transmit interrupts may later be re enabled by setting the appropriate bit in the INTERRUPT_PERMISSION_BYTE c Applicable to non DLCI specific interrupts only If th...

Page 71: ...DLCIs configured should be set at both stations and DLCIs should be added to complete the configured DLCI list Press S to save the configuration Execute ENABLE_COMMUNICATIONS on both machines On the...

Page 72: ...nsmit on each DLCI at a rate such that the network will never set the DE bit It will select frames from the transmit buffer so that as far as possible line utilization is maximized while still staying...

Page 73: ...nc 1999 2000 2001 Page 73 of 78 If there is consistent congestion on any DLCI the Forward CIR should be raised Note that you can always configure the board to have a higher CIR than the network but th...

Page 74: ...loaded by S508LOAD EXE FR_TEST EXE is a high level interface to the Frame Relay code which allows the user to perform individual interface commands S508LOAD EXE S508LOAD EXE is a PC DOS program and h...

Page 75: ...an error message will be displayed and an exit code will be returned A description of these messages and corresponding exit codes is given in The section Error Messages Optionally a h option may be u...

Page 76: ...Cx Dx Ex where x 0 2 4 6 8 A C For example CA means that the shared memory area is from CA000 to CBFFF Note that this argument must be the same as that used when executing S508LOAD EXE If FR_TEST does...

Page 77: ...guments exit code of 0x03 The memory segment address MEMORY SEGMENT read from the command line is invalid an invalid memory segment address was specified in the command line arguments exit code of 0x0...

Page 78: ...ould not locate the S508 hardware at the specified I O port address Check the jumper settings exit code of 0x09 FR_TEST EXE The error messages and corresponding exit codes for FR_TEST are as follows A...

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