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UM020205-0908

 

   

         Schematics

ZNEO

®

 Z16F Series Development Kit

User Manual

13

Figure 4. ZNEO Z16F Series MCU Development Kit

5

5

4

4

3

3

2

2

1

1

D

D

C

C

B

B

A

A

PD0_PWMH1_ADR20

PJ

4

_

D

ATA1

2

PK4

_

n

C

S2

P

K

1_nB

LE

N

GND

P

J2_D

A

TA

10

P

D

3_DE

1_A

D

R16

PJ

7

_

D

A

TA1

5

PF5_ADR5

PF0_ADR0

P

K

7_nCS

5

GND

PA2

_

D

E0

PA0_T0IN

GND

P

B

1__A

NA

1_

T

0I

N1

PD1_PWML1_ADR21

PJ

1

_

D

A

TA

9

P

K

2_nCS

0

PA5

_

TXD

0

P

C

5_

MISO

VCC_33v

PE3_DATA3

P

B

0__A

NA

0_T

0I

N0

PF1_ADR1

V

CC_33v

P

K

3_nCS

1

PE0_DATA0

PA1

_

T0

O

U

T

PB4

_

_

AN

A4

PC

4

_

MO

SI

PJ

0

_

D

A

T

A8

-RESET

P

A

4_RX

D0

PF7

_

A

D

R

7

PH

1

_

AN

A9

_

n

R

D

PF6_ADR6

PE4_DATA4

P

B5

_

_

AN

A5

PF2_ADR2

PH

2

_

AN

A1

0

PE1_DATA1

V

C

C_33

v

PH

0

_

AN

A8

_

n

W

R

P

D

5_TX

D1_A

DR19

P

J6

_

D

ATA1

4

P

B

3__A

NA

3_OP

OUT

V

CC_33V

PF3_ADR3

GND

V

C

C_33v

PJ

3_D

ATA1

1

PC2_nSS

GND

PK5

_

n

C

S3

PH

3

_

AN

A1

1

_

C

P

IN

P_

n

W

AIT

P

D

4_RX

D1_A

DR18

P

J5

_

D

ATA1

3

PK0

_

n

BH

EN

GND

PE2_DATA2

P

B

6_A

NA

6_OP

IN

P

VC

C

_

3

3

v

PF4_ADR4

PK6

_nC

S

4

P

B

2__A

N

A

2_T

0I

N2

VCC_33v

PD2_PWMH2_ADR22

PA3

_

n

C

T

S0

PB7

_

AN

A7

_

O

PIN

N

PC1_TOUT

PC1

PC3_SCK

PC3

PC0_T1IN

PA6_SCL
PA7_SDA

PC4_MOSI

PC4

PA4_RXD0

PA3_nCTS0

PA5_TXD0

PC5_MISO

PC5

PA1_T0OUT

PC2_nSS

PC2

PK5_nCS3

PK5

PK7_nCS5

PK7

PK0_nBHEN

PK0

PK6_nCS4

PK6

PK4_nCS2

PK4

PK2_nCS0

PK2

PK1_nBLEN

PK1

PH3_ANA11_CPINP_nWAIT

ANA11

PH2_ANA10

ANA10

PK3_nCS1

PK3

PF4_ADR4

A4

PJ2_DATA10

D10

PF2_ADR2

A2

PJ3_DATA11

D11

PE5_DATA5

D5

PJ0_DATA8

D8

PE1_DATA1

D1

PJ5_DATA13

D13

PG0_ADR8

A8

PE7_DATA7

D7

PE4_DATA4

D4

PG7_ADR15

A15

PF3_ADR3

A3

PF7_ADR7

A7

PE2_DATA2

D2

PF5_ADR5

A5

PJ6_DATA14

D14

PJ4_DATA12

D12

PG3_ADR11

A11

PE0_DATA0

D0

PJ1_DATA9

D9

PF6_ADR6

A6

PG4_ADR12

A12

PG5_ADR13

A13

PE3_DATA3

D3

PG1_ADR9

A9

PG6_ADR14

A14

PE6_DATA6

D6

PJ7_DATA15

D15

PG2_ADR10

A10

PF1_ADR1

A1

PF0_ADR0

A0

A20
A21
A22
A16
A18
A19
A17
A23

PD0_PWMH1_ADR20

PD3_DE1_ADR16
PD4_RXD1_ADR18

PD7_PWML2_ADR23

PD2_PWMH2_ADR22

PD6_nCTS1_ADR17

PD1_PWML1_ADR21

PD5_TXD1_ADR19

PD5_TXD1_ADR19

PD3_DE1_ADR16

PD2_PWMH2_ADR22

PD1_PWML1_ADR21

PD7_PWML2_ADR23

PD6_nCTS1_ADR17

PD0_PWMH1_ADR20

PD4_RXD1_ADR18

DE1

nCTS1

PWML1
PWMH2

TXD1

PWMH1

PWML2

RXD1

PC6_T2IN_PWMH0

PC6

PC7_T2OUT_PWML0

PC7

PH1_ANA9_nRD

PH0_ANA8_nWR

ANA_9
ANA_8

OPINP_CINN

VR

EF

AG

N

D

ANA_5

CINP
OPOUT

ANA_M2
ANA_M1
ANA_M0

-MC_EN

Vref

AGND

ANA6
ANA11

ANA7

ANA1
ANA0

ANA2

PA0_T0IN

ANA_M1

ANA_M2

ANA_M0

VCC_33V

PB3__ANA3_OPOUT

ANA3

PB2__ANA2_T0IN2

ANA2

PB1__ANA1_T0IN1

ANA1

PB6_ANA6_OPINP

ANA6

PB4__ANA4

ANA4

PB5__ANA5

ANA5

ANA3

PB0__ANA0_T0IN0

ANA0

PB7_ANA7_OPINN

ANA7

PA2_DE0

AVC

C

-MC_EN

VCC_33V

GND

DBG

VCC_33V

-RESET

VCC_33V

VCC_33V

PC1_TOUT

PG6_ADR14

PD6_nCTS1_ADR17

PC0_T1IN

VCC_33v

PE5_DATA5

PG2_ADR10

PE7_DATA7

PG3_ADR11

DBG

GND

PC3_SCK

VCC_33v

PG0_ADR8

PE6_DATA6

PG5_ADR13

PG1_ADR9

PA6_SCL
PA7_SDA

PD7_PWML2_ADR23

PC6_T2IN_PWMH0

PG4_ADR12

PC7_T2OUT_PWML0

PG7_ADR15

GND

OPINN

PC0

ANA_5

ANA5

D[15:0]

A[23:0]

-WR

-RD

ANA[11:10]

ANA_M[2:0]

ANA_9
ANA_8

ANA[7:0]

PC[7:0]

PK[7:0]

-MC_EN

PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7

PWMH1
PWML1
PWMH2

PWML2

DE1

TXD1

RXD1

nCTS1

-XM_EN

VREF

-RESET

PC0_T1IN

VCC_33V

VCC_33V

Title

Size

Document Number

Rev

Date:

Sheet

of

96C0999-001

C

Z8F1285 Evaluation Module. Schematic.

B

2

4

Monday, May 08, 2006

Title

Size

Document Number

Rev

Date:

Sheet

of

96C0999-001

C

Z8F1285 Evaluation Module. Schematic.

B

2

4

Monday, May 08, 2006

Title

Size

Document Number

Rev

Date:

Sheet

of

96C0999-001

C

Z8F1285 Evaluation Module. Schematic.

B

2

4

Monday, May 08, 2006

DBG
INTERFACE

XM_OUT/MC_IN

MCU

C3

0.01uF

C3

0.01uF

C6

22pF

C6

22pF

R6

10K

R6

10K

U3

SN74CBTLV3861

U3

SN74CBTLV3861

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

A9

10

A10

11

B1

22

B2

21

B3

20

B4

19

B5

18

B6

17

B7

16

B8

15

B9

14

B10

13

NC

1

VCC

24

GND

12

OE

23

C4 12pF

C4 12pF

C22

0.01uF

C22

0.01uF

R5 49.9K

R5 49.9K

C9

0.01uF

C9

0.01uF

C21

0.01uF

C21

0.01uF

C20

0.01uF

C20

0.01uF

C2

0.1uF

C2

0.1uF

U2

Z16F2811AL20SG

U2

PA0/T0IN/OUT/DMA0REQ

1

PD2/PWMH2/ADR22

2

PC2/SS/CS4

3

PF6/ADR6

4

RESET

5

VDD

6

PF5/ADR5

7

PF4/ADR4

8

PF3/ADR3

9

PE3/DATA3

11

PE4/DATA4

10

GND

12

PE2/DATA2

13

PE1/DATA1

14

PE0/DATA0

15

GND

16

PF2/ADR2

17

PF1/ADR1

18

PF0/ADR0

19

VDD

20

PD1/PWML1/ADR21

21

PD0/PWMH1/ADR20

22

EXTAL

23

XTAL

24

PA

1

/T

0

OU

T

/D

M

A

0CK

95

PA6/SCL/CS3

75

PA7/SDA/CS4

74

GND

25

A

G

ND

45

GND

51

A

V

DD

31

PH0/ANA8/WR

32

PH1/ANA9/RD

33

PB0/A

NA

0/T0IN0

34

PB1/ANA1/T

0IN1

35

PB4/ANA4

36

P

B

5/

A

NA5

37

P

B

6/ANA6/

O

P

INP/CINN

38

PB7/ANA7/OPINN

39

PB3/ANA3/OPOUT

40

PB2/A

NA

2/T0IN2

41

PH2/ANA10/CS0

42

PH3/ANA11/CPINP/WAIT

43

V

RE

F

44

PC0/T1IN/OUT/DMA1REQ/CINN

52

PC1/T1OUT/DMA1ACK/COUT

53

DBG

54

PC6/T2IN/OUT/PWMH0

55

PC7/T2OUT/PWML0

56

PG7/ADR15

57

VDD

58

PG6/ADR14

59

PG5/ADR13

60

PG4/ADR12

61

PG3/ADR11

62

PE7/DATA7

64

PE6/DATA6

65

PE5/DATA5

66

PG2/ADR10

67

PG1/ADR9

68

PG0/ADR8

70

PD7/PWML2/ADR23

71

PC3/SCK/DMA2REQ

72

PD6/CTS1/ADR17

73

PA5/T

X

D0/CS2

76

PA4/R

X

D0/CS1

77

PC4/MOS

I/D

MA2

A

CK

85

PD5/TXD1/ADR19

86

PD4/RXD1/ADR18

87

P

D3/DE

1

/ADR1

6

8

8

PC5

/M

ISO/CS

5

89

PF

7/ADR7

90

PA

3

/CTS

0/FA

ULT0

93

P

A

2/

DE

0/FA

ULTY

94

G

ND

92

VDD

91

G

ND

78

VDD

79

GND

69

VDD

63

PK3/CS

1

26

PK2/CS0

27

PK1/BLEN

28

PK0/BHEN

29

V

DD

30

P

K

4/CS2

46

PK5/CS3

47

PK6/CS4

48

PK7/CS5

49

VDD

50

PJ7

/DATA15

80

P

J

6/

DATA

14

81

P

J

5/

DATA

13

82

PJ

4/DATA12

83

GN

D

84

PJ3/DAT

A11

97

VDD

96

PJ

2/DATA10

98

PJ1/DAT

A

9

99

PJ0

/DATA8

100

R11

1K

R11

1K

R4

10K

R4

10K

P3

HDR/PIN 2x3

P3

HDR/PIN 2x3

1

2

3

4

5

6

C18

0.01uF

C18

0.01uF

C19

0.01uF

C19

0.01uF

J1

HDR/PIN 1x2

J1

HDR/PIN 1x2

1
2

R35
10K

R35
10K

C8

0.01uF

C8

0.01uF

+

C11

10uF

+

C11

10uF

C23

1000pF

C23

1000pF

C16

0.01uF

C16

0.01uF

U4A

SN74LVC04

U4A

SN74LVC04

1

2

14

7

C17

0.01uF

C17

0.01uF

C15

0.01uF

C15

0.01uF

R9

10K

R9

10K

R8 0 OHm

R8 0 OHm

C14

0.01uF

C14

0.01uF

C5

22pF

C5

22pF

U5

SN74CBTLV3861

U5

SN74CBTLV3861

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

A9

10

A10

11

B1

22

B2

21

B3

20

B4

19

B5

18

B6

17

B7

16

B8

15

B9

14

B10

13

NC

1

VCC

24

GND

12

OE

23

C12

0.01uF

C12

0.01uF

C1

100pF

C1

100pF

C13

0.01uF

C13

0.01uF

U1

SN74CBTLV3861

U1

SN74CBTLV3861

A1

2

A2

3

A3

4

A4

5

A5

6

A6

7

A7

8

A8

9

A9

10

A10

11

B1

22

B2

21

B3

20

B4

19

B5

18

B6

17

B7

16

B8

15

B9

14

B10

13

NC

1

VCC

24

GND

12

OE

23

R1 10K

R1 10K

R7

0 OHm

R7

0 OHm

Y1

20 MHz

Y1

20 MHz

1

3

2

R3

12.4K

R3

12.4K

R2

7.8K

R2

7.8K

C7

0.01uF

C7

0.01uF

C10

0.01uF

C10

0.01uF

R10

5K

R10

5K

1

3

2

Z16F2811

Summary of Contents for ZNEO Z16F Series

Page 1: ...Copyright 2008 by Zilog Inc All rights reserved www zilog com ZNEO Z16F Series Development Kit User Manual UM020205 0908 Z16F2800100ZCOG...

Page 2: ...form can be reasonably expected to cause the failure of the life support device or system or to affect its safety or effectiveness Document Disclaimer 2008 by Zilog Inc All rights reserved Information...

Page 3: ...fer to the corresponding pages and appropriate links in the table below Date Revision Level Description Page No September 2008 05 Updated Introduction section 1 September 2007 04 Updated Title Schemat...

Page 4: ...duction 1 Safeguards 1 Installation 1 ZNEO Z16F Series Development Board 2 Introduction 2 Features 3 Development Kit Block Diagram 4 ZNEO MEMORY LAYOUT 5 MCU 7 UART with IrDA ENDEC 9 Switches and LEDs...

Page 5: ...anual acquaints you with the ZNEO Z16F Series MCU Development Kit and provides instructions on setting up and using the tools to start building designs and applications Z16F2811AL20SG is the silicon u...

Page 6: ...Development Board Introduction The ZNEO Z16F Series development board is a development and proto typing board for the ZNEO Z16F Series MCU The board allows you to evaluate the features of ZNEO Z16F S...

Page 7: ...l RAM 3 LEDs RS 232 interface On Chip Debugger interface IrDA transceiver Electrical and mechanical compatibility with Zilog Modular Develop ment System MDS architecture One RESET pushbutton S1 Two SP...

Page 8: ...Z16F Series development kit Figure 2 ZNEO Z16F Series Development Kit Block Diagram Z8F1285 128KB FLASH 4KB SRAM 12 channel ADC 3 channel PWM FLASH 1 M x 16 CS0 SRAM 256 K x 16 CS1 IrDA External GPIO...

Page 9: ...he external memory is optional Every address space is defined as a specific range of addresses located at a given place in the framework of the unified 24 bit address space and the address ranges of t...

Page 10: ...he total extent of this space is device dependent For example a device equipped with 4 K of RAM has internal RAM starting at address FF_B000H and ending at address FF_BFFFH Since internal RAM is acces...

Page 11: ...in the range of both the CS0 and CS1 signals In this case the ZNEO CPU uses a chip select priority scheme It asserts only a single chip select with the highest priority among those that contain the a...

Page 12: ...ection to external data memory and peripherals with 6 chip selects with Programmable Wait states 24 bit address bus supports up to 16 MB Selectable 8 bit or 16 bit data bus widths Programmable Chip Se...

Page 13: ...3 6 V operating voltage with 5 V tolerant inputs 0 C to 70 C standard temperature 40 C to 105 C extended temperature and 40 C to 125 C automotive operating ranges For more information refer to ZNEO Z1...

Page 14: ...witch S2 connected to the chip port PA7_SDA SPST switch S3 connected to the chip port PC0_T1IN Potentiometer R10 is reserved for future use Jumper Settings Table 2 provides information on the shunt st...

Page 15: ...P1 JP2 and JP4 are provided in Schematics on page 12 J3 IN IrDA interface disabled X J6 OUT 8 bit MDS interface disabled X J6 IN 8 bit MDS interface enabled J7 OUT External Flash Write Protect disable...

Page 16: ...2 PA2_DE0 PA3_CTS0 PA5_TXD0 PA7_SDA RESET TXD1 RXD1 A1 FAB A1 FAB MCU MCU PK 7 0 D 15 0 TXD1 A 23 0 RXD1 ANA_M 2 0 ANA 11 10 WR nCTS1 PC 7 0 PWML1 PWML2 ANA 7 0 PWMH1 ANA_8 DE1 PWMH2 ANA_9 RD MC_EN PA...

Page 17: ...eet of 96C0999 001 C Z8F1285 Evaluation Module Schematic B 2 4 Monday May 08 2006 Title Size Document Number Rev Date Sheet of 96C0999 001 C Z8F1285 Evaluation Module Schematic B 2 4 Monday May 08 200...

Page 18: ...2006 Title Size Rev Date Sheet of 96C0999 001 C Z8F1285 Evaluation Module Schematic B 3 4 Monday May 08 2006 Title Size Rev Date Sheet of 96C0999 001 C Z8F1285 Evaluation Module Schematic B 3 4 Monday...

Page 19: ...ON DC P1 CON DC 2 3 1 R15 10K R15 10K U4E SN74LVC04 U4E SN74LVC04 11 10 14 7 TP1 TP1 1 2 3 S3 EG1218 S3 EG1218 D1 GREEN D1 GREEN 2 1 P2 DB9 Female P2 DB9 Female 5 9 4 8 3 7 2 6 1 C49 10uF C49 10uF C48...

Page 20: ...answers to technical questions about the product documentation or any other issues with Zilog s offerings please visit Zilog s Knowledge Base at http www zilog com kb For any comments detail technica...

Page 21: ...Mouser Electronics Authorized Distributor Click to View Pricing Inventory Delivery Lifecycle Information ZiLOG Z16F2800100ZCOG...

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