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Mainboard User's Manual
Advanced Chipset Features
DRAM Timing by SPD
When Enabled, DRAM clock speed is automatically determined by system BIOS based on
the EEPROM data on the DIMM module. Set to Disabled if you want to select DRAM
clock speed manually.
DRAM Clock
This item allows you to control the DRAM speed.
The Choices: 100MHz, 133MHz.
SDRAM Cycle Length
When synchronous DRAM is installed, the number of clock cycles of CAS latency depends
on the DRAM timing. Do not reset this field from the default value specified by the system
designer. The Choices: 2, 3.
Bank Interleave
Set to 'Enabled' to increase memory performance.
Default is 'Disabled' for better DRAM compatibility.
DRAM Drive Strength
This item is reserved for technical support personnel only. Default is Auto.
Memory Hole
In order to improve performance, certain space in memory is reserved for ISA cards. This
memory must be mapped into the memory space below 16MB. The Choices: 15M-16M,
Disabled.
BIOS
Setup
