3-25
3-26
3. SYSTEM CIRCUIT DIAGRAM
DSP RESET Signal
13.3MHz SDRAM clock
SDRAM Logo picture will not display
Clock generation
MPEG IC
• Initial function
• Video output
•Aduio output
Main command data and clock
Level shift IC initial
function will be abnormal
Flash Memory servo
program download
µ
-com program
download connector
Main Reset signal
from front
µ
-com
1.8V Regulator
Main data
interface
DV7832NXS
Summary of Contents for DVB318
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Page 22: ...3 13 24 480P DATA_EN H_Synk V_Synk 25 720P DATA_EN H_Synk V_Synk...
Page 23: ...3 14 26 1080i DATA_EN H_Synk V_Synk...
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Page 36: ...3 31 3 32 6 DVI CIRCUIT DIAGRAM DV7832NXS...
Page 40: ...3 39 3 40 PRINTED CIRCUIT DIAGRAMS 1 MAIN P C BOARD TOP VIEW LOCATION GUIDE...
Page 41: ...3 41 3 42 2 MAIN P C BOARD BOTTOM VIEW LOCATION GUIDE...
Page 42: ...3 43 3 44 3 KEY P C BOARD Solder Side 4 TIMER P C BOARD LOCATION GUIDE Solder Side...
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