CONFIDENTIAL
Z3-DM8168-PCI-RPS V1.05.01c
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Z3 Technology, LLC
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100 N 8
th
ST, STE 250
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Lincoln, NE 68508-1369 USA
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+1.402.323.0702
37
Z3 Technology recommends that development with the PCI-RPS system be done on an Asus P8H67-MPRO
motherboard. We found that the BIOS performs the system initialization correctly.
The systems with “bad BIOS” tend to work correctly when the add-in card is plugged into the 1-lane slot,
when present. This can be accomplished with a PCIe to PCIe adapter or when the 1-lane slot connector on
the motherboard is open at the edge to allow insertion of boards with more than 1 lane.
10.3 The DM8168-MOD-xx PCI Express hardware
The PCI Express bus is not really a “bus”. Instead, it is a point-to-point connection between a PCI master
and a slave. The PCI master can send commands to perform PCI transactions, and the slave carries them
out. The PCIe interface on the master side is called the “root complex”, and the slave side is the
“endpoint”. A computer or any device with a slot is the root complex, while anything that plugs into the
slot is the endpoint.
The Z3-DM8168-MOD-xx module is capable to perform as a root complex or endpoint. In order for the Z3
module to be used in a specific PCI Express setting, the module must have the proper configuration. By
default, Z3 ships Z3-DM8168-MOD-2x modules configured as root complex, and Z3-DM8168-MOD-3x
configured as endpoint. The Z3-DM8168-PCI-RPS kit contains a Z3-DM8168-MOD-3x module, and therefore is
by default configured as an endpoint.
At the hardware level, inside the module the difference is the PCIe clock generation. PCI Express requires
that the root complex provide a 100 MHz clock to the endpoint. The DM8168 processor uses this clock to
drive its internal PCIe interface. So when a module is configured as root complex, it will provide the 100
MHz clock to the processor and the PCIe bus. When the module is configured as an endpoint, the PCIe bus
clock is an input to be driven from the root complex, and it is required to drive the PCI Express interface
on the DM8168 chip.
Another point to keep in mind is that the same PCIe interface on the chip is used for both root complex
and endpoint configurations. The software needs to be set to operate in the right mode or the DM8168
system will not work as expected. In particular, if the board is set up for endpoint operation and the Linux
kernel is configured for root complex, the kernel will hang waiting for the PCIe clock during initialization
and the module will not boot.
