CONFIDENTIAL
Z3-DM8168-PCI-RPS
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Z3 Technology, LLC ♦ 4701 Innovation Drive CB103 ♦ Lincoln, NE 68521 USA ♦ +1.402.323.0702
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One of the functions of the BIOS is to determine if there is a display adapter card present in the system,
and if so the BIOS makes it the primary video monitor. Some BIOSes mistakenly think that any add-in
card present in its 16-lane PCIe slot must be a display controller, even if the PCIe card clearly tells the
BIOS (via configuration space) it isn’t so. This BIOS behavior is most frequent on motherboards with only
one PCIe slot or one 16-lane and one 1-lane slot, where the most popular add-in card on the 16-lane slot
would in fact be a video controller. The problem is that these systems will effectively either not boot with
the Z3-DM368-APP-2x card (or any other non-video card) plugged in, or boot without video. Usually
there are no configuration settings in the BIOS that will correct the behavior of the BIOS, making it
effectively impossible to use that motherboard.
Z3 Technology recommends that development with the PCI-RPS system be done on an Asus P8H67-
MPRO motherboard. We found that the BIOS performs the system initialization correctly.
The systems with “bad BIOS” tend to work correctly when the add-in card is plugged into the 1-lane slot,
when present. This can be accomplished with a PCIe to PCIe adapter or when the 1-lane slot connector on
the motherboard is open at the edge to allow insertion of boards with more than 1 lane.
12.3
The DM8168-MOD-xx PCI Express hardware
The PCI Express bus is not really a “bus”. Instead, it is a point-to-point connection between a PCI master
and a slave. The PCI master can send commands to perform PCI transactions, and the slave carries them
out. The PCIe interface on the master side is called the “root complex”, and the slave side is the
“endpoint”. A computer or any device with a slot is the root complex, while anything the plugs into the slot
is the endpoint.
The Z3-DM8168-MOD-xx module is capable to perform as a root complex or endpoint. In order for the Z3
module to be used in a specific PCI Express setting the module must have the proper configuration. By
default, Z3 ships Z3-DM8168-MOD-2x modules configured as root complex, and Z3-DM8168-MOD-3x
configured as endpoint. The Z3-DM8168-PCI-RPS kit contains a Z3-DM8168-MOD-3x module, and
therefore is by default configured as endpoint.
At the hardware level, inside the module the difference is the PCIe clock generation. PCI Express requires
that the root complex provide a 100 MHz clock to the endpoint. The DM8168 processor uses this clock to
drive its internal PCIe interface. So when a module is configured as root complex it will provide the 100
MHz clock to the processor and the PCIe bus. When the module is configured as an endpoint, the PCIe bus
clock is an input to be driven from the root complex, and it is required to drive the PCI Express interface
on the DM8168 chip.
Another point to keep in mind is that the same PCIe interface on the chip is used for both root complex and
endpoint configurations. The software needs to be set to operate in the right mode or the DM8168 system
will not work as expected. In particular, if the board is set up for endpoint operation and the Linux kernel is
