CLM920_AC5 Mini PCIE LTE Module Hardware Manual
Shanghai Yuge Information Technology co., LTD
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must comply with the characteristics of USB2.0, and the USB interface is defined as follows
：
Table 3-7 USB interface pin definition
Pin number
Signal name
IO
Description
36
USB_DM
IO
USB differential signal-
38
USB_DP
IO
USB differential
4,9,15,18,21,26,27,29,34,
35,37,40,43,50
GND
Ground
As a USB slave device, the module supports USB sleep and wake-up mechanisms. The
reference design circuit is as follows
：
Figure 3-10 USB connection design circuit diagram
1. The USB interface supports high-speed (480Mbps) and full-speed (12Mbps) modes, so
the wiring design needs to strictly follow the USB2.0 protocol requirements, pay
attention to the protection of the data line, differential wiring, the control impedance is 90
Ω
.
2. In order to improve the antistatic performance of the USB interface, it is recommended to
add ESD protection devices on the data line, and the equivalent capacitance value of the
protection device is less than 2pF.
3. The power supply voltage of the USB interface bus is provided internally by the module
and does not need to be provided externally. At the same time, because the USB interface
of the module does not provide external USB bus power, the module can only be used as
a slave device of the USB bus device.
The USB interface can support the following functions:
