Chapter 2 Hardware description
Manual VIPA System 200V
2-8
HB97E - CPU - RE_21x-2BS03 - Rev. 15/16
Order no.
214-2BS03
Number of FCs
1024
Maximum FC size
16 KB
Number range FCs
0 ... 1023
Maximum nesting depth per priority class
8
Maximum nesting depth additional within an error OB 1
Time
Real-time clock buffered
9
Clock buffered period (min.)
30 d
Type of buffering
Vanadium Rechargeable
Lithium Batterie
Load time for 50% buffering period
20 h
Load time for 100% buffering period
48 h
Accuracy (max. deviation per day)
10 s
Number of operating hours counter
8
Clock synchronization
-
Synchronization via MPI
-
Synchronization via Ethernet (NTP)
-
Address areas (I/O)
Input I/O address area
1024 Byte
Output I/O address area
1024 Byte
Process image adjustable
-
Input process image preset
128 Byte
Output process image preset
128 Byte
Input process image maximal
128 Byte
Output process image maximal
128 Byte
Digital inputs
8192
Digital outputs
8192
Digital inputs central
512
Digital outputs central
512
Integrated digital inputs
-
Integrated digital outputs
-
Analog inputs
512
Analog outputs
512
Analog inputs, central
128
Analog outputs, central
128
Integrated analog inputs
-
Integrated analog outputs
-
Communication functions
PG/OP channel
9
Global data communication
9
Number of GD circuits, max.
4
Size of GD packets, max.
22 Byte
S7 basic communication
9
S7 basic communication, user data per job
76 Byte
S7 communication
9
S7 communication as server
9
S7 communication as client
-
S7 communication, user data per job
160 Byte
Number of connections, max.
16
Functionality Sub-D interfaces
Type MP²I
Type of interface
RS485
Connector
Sub-D, 9-pin, female
Electrically isolated
-
MPI
9
MP²I (MPI/RS232)
9
Point-to-point interface
-
Type COM1
Type of interface
RS232
