A
1
2
3
4
5
6
7
8
9
10
N
M
L
K
J
I
H
G
F
E
D
C
B
104
RX-V483/HTR-4071
N_FC
T
NCPU_SPI_MOS
I
NCPU_SPI_SC
K
NCPU_SPI_MIS
O
N C P U _ M I S O
H D I N _ H P D 2
H D I N _ H P D 3
H D I N _ H P D 4
V S E L 1
HDMI_SPI_N_C
S
HDMI_SPI_MOS
I
HDMI_SPI_MIS
O
HDMI_SPI_SC
K
AMP_LM
T
N C P U _ M O S I
E E P _ N _ C S
E E P _ M I S O
E E P _ S C K
E E P _ M O S I
2 3 2 C _ D B G _ M I S O
T U N _ N _ I N T
F L A S H _ N _ B O O T
SWD_SW
V
SWD_I
O
SWD_SC
K
V O L _ M O S I
TUN_SC
L
R E M _ I N 1
A C P W R _ D E T
P A _ B _ R Y
USB_VBUS_PR
T
PS3_PR
T
PS2_PR
T
PS1_PR
T
D S P _ M I S O
D S P _ S C K
D S P _ M O S I
V S E L 2
VID_PO
N
H D M I _ P O N
D C D C _ P O N
D S P _ P O N
TUN_SD
A
OSDFS_MIS
O
OSDFS_N_C
S
OSDFS_MOS
I
OSDFS_SC
K
OSDFS_SC
K
OSDFS_N_C
S
OSDFS_MIS
O
OSDFS_MOS
I
T E S T 1
L M T _ P S 1
L M T _ P S 2
L M T _ D C
L M T _ I
L M T _ P S 3
L M T _ O L V
FLP_PO
N
FLD_N_RS
T
FLD_N_C
S
FLD_SC
K
FLD_MOS
I
MIC_N_DE
T
MT_S
W
MT_3C
H
MT_SU
R
MT_S
B
TEST
1
PR
Y
I_PR
T
TUN_N_RS
T
TUN_SD
A
TUN_SC
L
TUN_N_IN
T
H D M I _ S C L
H D M I _ S D A
H D M I _ N _ R S T
NCPU_SPI_SC
K
NCPU_SPI_MOS
I
NCPU_PHOL
D
NCPU_VBUSDR
V
USB_VBUS_PO
N
ADTSEL_N_E
N
NCPU_SPI_MIS
O
USB_VBUS_PR
T
NCPU_MOS
I
NCPU_MIS
O
NCPU_PO
N
DCDC_PO
N
+3.3S_PO
N
DSP_PO
N
HDMI_PO
N
NDAC_N_M
T
DIR1_N_C
S
DIR1_N_RS
T
DIR1_N_IN
T
DSP_SC
K
DSP_MIS
O
DSP_MOS
I
DSP1_N_C
S
MT_D
A
DSP1_N_RS
T
DSP1_N_SPIRD
Y
DSP1_N_IN
T
A U P _ S E L
HDMI_SPI_SC
K
HDMI_SPI_MIS
O
HDMI_SPI_MOS
I
HDMI_SPI_N_C
S
CE
C
AUP_SE
L
HDIN_HPD
4
HDIN_HPD
3
HDIN_HPD
2
HDIN_HPD
1
HDMI_SD
A
HDMI_SC
L
HAU_N_IN
T
HDMI_N_IN
T
P S 2 _ P R T
P S 3 _ P R T
ACPWR_DE
T
PR
Y
N _ F C T
TUN_N_RS
T
DSP_NI
C
DSP2_N_SPIRD
Y
DSP2_N_RS
T
DSP2_N_C
S
HDMI_N_RS
T
THM
1
THM
2
VOL_MOS
I
V O L _ S C K
VOL_R
B
VOL_R
A
ISEL_R
B
ISEL_R
A
FLD_N_RS
T
FLP_PO
N
HDMI_N_IN
T
I_PR
T
HP_N_DE
T
LMT_
I
M I C _ N _ D E T
+ 3 . 3 S _ P O N
P R Y
M T _ S B
M T _ N _ S U R
S P R Y _ 3 C H
S P R Y _ S B
S P R Y _ S U R
D I R 1 _ N _ I N T
D S P 1 _ N _ I N T
M T _ N _ S B
M T _ N _ 3 C H
M T _ N _ S W
M T _ 3 C H
M T _ S U R
M T _ S W
KY_AD
2
KY_AD
1
DC_PR
T
AMP_OL
V
STBY_LE
D
HAU_N_IN
T
ARC_M
T
ARC_N_IN
T
ARC_N_IN
T
ARC_M
T
C E C
NDAC_N_M
T
DSP2_N_C
S
ARC_N_RS
T
A R C _ N _ R S T
D I R 1 _ N _ R S T
D I R 1 _ N _ C S
D S P 1 _ N _ R S T
D S P 2 _ N _ R S T
DSP2_N_SPIRD
Y
MT_D
A
ARC_I2S_SE
L
A R C _ I 2 S _ S E L
A D T S E L _ N _ E N
I 2 S B U F _ E N
LMT_OL
V
LMT_D
C
LMT_PS
3
LMT_PS
2
LMT_PS
1
P S W _ N _ D E T
FLD_N_C
S
NCPU_ADT_MUT
E
E E P _ N _ C S
U S B _ V B U S _ P O N
2 3 2 C _ D B G _ M O S I
E E P _ M O S I
E E P _ S C K
E E P _ M I S O
FLD_SC
K
FLD_MOS
I
NCPU_PO
N
NCPU_PHOL
D
H D I N _ H P D 1
D S P _ N I C
N C P U _ V B U S D R V
NCPU_ADT_MUT
E
D A C _ P O N
DAC_PO
N
PS2_PR
T
REM_IN
1
ISEL_R
A
PSW_N_DE
T
KY_AD
1
KY_AD
2
VOL_R
A
VOL_R
B
FLD_PO
N
STBY_LE
D
ISEL_R
B
PS2_PR
T
FLD_PO
N
PA_B_R
Y
HP_N_DE
T
HPR
Y
SPRY_S
B
SPRY_3C
H
PS2_PR
T
I2SBUF_E
N
DSP1_N_RS
T
H P R Y
H W D E T
P S 1 _ P R T
VID_PO
N
V_N_FMUT
E
THM
1
T E S T 2
D S P 1 _ N _ S P I R D Y
D S P 1 _ N _ C S
AMP_LM
T
SPRY_SU
R
VOL_SC
K
THM
2
DC_PR
T
I_PR
T
AMP_OL
V
PS1_PR
T
M O D E
HWDE
T
TEST
1
MOD
E
TEST
2
V_N_FMUT
E
VSEL
2
VSEL
1
PS2_PR
T
PS1_PR
T
S W D _ I O
S W D _ S C K
S W D _ S W V
2 3 2 C _ D B G _ M I S O
2 3 2 C _ D B G _ M O S I
F L A S H _ N _ B O O T
NCPU_SPI_MIS
O
NCPU_SPI_SC
K
NCPU_SPI_MOS
I
R22
7
3
3
R22
5
3
3
X L 2 1
1 2 M H Z
C24
1
0.1/10(BJ
)
D G N D
+3.3
M
+ 3 . 3 M
R 3 1 1 6 N 2 7 1 A - T R - F
IC2
4
1
O U T
2
V D D
3
G N D
4
N C
5
C D
CB2
6
5204
4
CB2
3
PH
I
@ n o U s e
C24
5
1/2
5
C24
7
1/2
5
C24
3
1/2
5
C24
6
0.1/10(BJ
)
R 2 4 0
1 M
0
J20
2
D G N D
D G N D
D G N D
+3.3
M
D 2 0 2
R B 5 0 0 V M - 4 0
R 2 7 1
2 7 K
+ 3 . 3 M
C 2 6 4 0 . 1 / 1 0 ( B J )
C 2 8 2
0 . 1 / 1 0 ( B J )
D G N D
R24
3
1
K
C 2 4 9
1 0 / 1 0
D G N D
+ 3 . 3 M
C 2 6 3
1 / 2 5
R 2 5 3
3 3
DGN
D
+ 3 . 3 M
R 2 4 9
1 0 K
R25
6
10
K
I C 2 5
V +
5
I C 2 5
V -
3
I C 2 5
S N 7 4 L V C 1 G 1 7 D C K R
2
4
D20
5
1SS355V
M
D20
4
1SS355V
M
D 2 0 3
1 S S 3 5 5 V M
D20
6
RB521S-30TE6
1
+ 3 . 3 M
C 2 7 9
0 . 1 / 1 0 ( B J )
R 2 7 7
1 M
R27
5
470
K
+ 3 . 3 M
C 2 7 8
1 0 / 1 0
+ 3 . 3 M
D G N D
D G N D
+ 3 . 3 M
D G N D
C 2 8 0
0 . 0 1 5 / 1 6 ( B )
D G N D
R 2 7 4
1 0 K
+ 3 . 3 M
R 2 7 8
1 0 K
R 2 7 6
3 3
C 2 7 7
0 . 1 / 1 0 ( B J )
D G N D
+ 3 . 3 M
D G N D
R20
4
10
K
R20
5
no_us
e
D G N D
+ 3 . 3 M
C 2 6 5 0 . 1 / 1 0 ( B J )
DGN
D
+5.5
V
C24
4
0.1/10(BJ
)
+ 3 . 3 S
Q 2 1 1
n o _ u s e
D G N D
C27
0
no_us
e
R 2 6 6
n o _ u s e
R 2 7 0
n o _ u s e
R 2 6 2
n o _ u s e
TP24
0
TP24
1
R24
2
1KX
4
R23
7
100X
4
DGN
D
C24
2
0.1/10(BJ
)
+3.3
M
R 2 2 1
3 3
R 2 2 0
3 3
R 2 1 1
3 3
+ 3 . 3 M
D G N D
C 2 3 8
0 . 1 / 1 0 ( B J )
+ 3 . 3 M
C 2 3 7
0 . 1 / 1 0 ( B J )
D G N D
+ 3 . 3 M
D G N D
C 2 3 9
0 . 1 / 1 0 ( B J )
R23
4
33X
4
R 2 1 4
1 0 K
D G N D
C 2 1 8
0 . 1 / 1 0 ( B J )
+ 3 . 3 H
R21
2
10
K
R 2 8 7
3 3 X 4
4
5
7
8
3
6
R 2 8 8
3 3 X 4
1
2
1
2
4
5
7
8
3
6
D G N D
+ 3 . 3 M
R 2 8 1
1 0 0 K X 4
1
2
3
+ 3 . 3 M
Q20
2
H N 4 B 0 1 J E ( T E 8 5 L ,
B 1
E
B 2
C 2
C 1
P L 0 . 3
Q 2 0 5
C 4 0 8 1 U B T L R
D G N D
R20
1
1
K
Q 2 0 4
A 1 5 7 6 U B T L R
Q20
1
H N 4 B 0 1 J E ( T E 8 5 L ,
B 1
E
B 2
C 2
C 1
+ 3 . 3 S
Q 2 0 6
A 1 5 7 6 U B T L R
P L 3 . 0
Q20
3
H N 4 B 0 1 J E ( T E 8 5 L ,
B 1
E
B 2
C 2
C 1
R20
2
9.1
K
R20
3
1
K
C 2 8 1
0 . 0 1 / 1 6 ( B )
TP30
0
R29
2
no_us
e
+ 3 . 3 S
10
K
R29
1
D G N D
+ 3 . 3 S
P L 0 . 3
DGN
D
P L 3 . 0
+ 3 . 3 S
P L 0 . 3
DGN
D
P L 3 . 0
S
3
.
3
+
3
.
0
L
P
DGN
D
P L 3 . 0
DGN
D
P L 3 . 0
P L 3 . 0
DGN
D
S
3
.
3
+
3
.
0
L
P
C 2 4 8
3 3 / 1 0
+ 3 . 3 S
R21
3
3
3
R21
0
100X
4
R20
9
R20
8
100X
4
R20
6
100X
4
+ 3 . 3 S
DGN
D
R21
8
100X
4
R22
6
10
0
R22
4
0
+ 3 . 3 S
C 2 0 3
n o _ u s e
C 2 0 4
n o _ u s e
D G N D
C 2 0 1
n o _ u s e
C 2 0 2
n o _ u s e
C 2 0 5
n o _ u s e
C 2 0 6
n o _ u s e
C 2 0 7
n o _ u s e
C 2 0 8
n o _ u s e
C 2 1 1
n o _ u s e
C 2 1 2
n o _ u s e
C 2 1 3
n o _ u s e
C 2 1 4
n o _ u s e
C 2 1 5
n o _ u s e
C 2 1 6
n o _ u s e
C 2 1 7
n o _ u s e
C 2 2 3
n o _ u s e
C 2 2 4
n o _ u s e
C 2 2 5
n o _ u s e
C 2 2 6
n o _ u s e
C 2 2 7
n o _ u s e
C 2 2 9
n o _ u s e
C 2 3 0
n o _ u s e
C 2 3 1
n o _ u s e
C 2 3 2
n o _ u s e
C 2 3 4
n o _ u s e
C 2 3 5
n o _ u s e
C 2 3 6
n o _ u s e
C 2 2 0
n o _ u s e
C 2 1 9
n o _ u s e
D G N D
DGN
D
+3.3
M
+3.3
S
DGN
D
Q20
7
A1576UBTL
R
R25
8
33
0
TU
L
TU
R
DGN
D
R27
2
100X
4
L 2 0 2
B K P 1 0 0 5 H S 6 8 0 - T
C 2 7 3
n o _ u s e
C 2 7 4
n o _ u s e
C 2 7 5
n o _ u s e
C 2 7 6
n o _ u s e
D G N D
C 2 7 2
3 3 / 1 0
C 2 7 1
n o _ u s e
T U E
A G N D
D G N D
J 2 0 4
n o _ u s e
C 2 6 6
n o _ u s e
D G N D
R 2 0 7
1 0 K
NCPU_PHOL
D
NCPU_VBUSDR
V
USB_VBUS_PO
N
ADTSEL_N_E
N
NCPU_MOS
I
NCPU_MIS
O
USB_VBUS_PR
T
NCPU_PO
N
DSP_PO
N
DCDC_PO
N
HDMI_PO
N
NDAC_N_M
T
DIR1_N_RS
T
DIR1_N_C
S
DIR1_N_IN
T
+3.3S_PO
N
DSP_SC
K
DSP_MOS
I
DSP_MIS
O
DSP1_N_C
S
MT_D
A
DSP1_N_RS
T
DSP1_N_SPIRD
Y
DSP1_N_IN
T
CE
C
HDMI_SPI_MIS
O
HDMI_SD
A
HAU_N_IN
T
HDMI_SC
L
HDIN_HPD
2
HDMI_N_IN
T
HDIN_HPD
3
HDMI_SPI_SC
K
HDMI_SPI_MOS
I
HDIN_HPD
4
HDIN_HPD
1
AUP_SE
L
HDMI_SPI_N_C
S
+ 3 . 3 S
D G N D
D G N D
+ 5 A
D G N D
+ 5 . 5 V
DSP2_N_C
S
DSP2_N_RS
T
DSP2_N_SPIRD
Y
DSP_NI
C
+3.3
T
+3.3
M
C25
0
0.1/10(BJ
)
HDMI_N_RS
T
C 2 5 3
0 . 0 1 / 1 6 ( B )
C 2 5 4
0 . 0 1 / 1 6 ( B )
C 2 5 5
0 . 0 1 / 1 6 ( B )
C 2 5 6
0 . 0 1 / 1 6 ( B )
C 2 6 2
0 . 0 1 / 1 6 ( B )
C 2 6 1
0 . 0 1 / 1 6 ( B )
C 2 5 9
0 . 0 1 / 1 6 ( B )
C 2 5 7
0 . 0 1 / 1 6 ( B )
C 2 5 8
0 . 0 1 / 1 6 ( B )
C 2 6 0
0 . 0 1 / 1 6 ( B )
D G N D
C 2 5 1
0 . 1 / 1 0 ( B J )
C 2 5 2
0 . 1 / 1 0 ( B J )
R24
4
10
0
R24
5
10
0
R21
6
10
0
CB2
4
PH
L
1
2
3
4
5
D 2 0 1
1 S S 3 5 5 V M
C 2 2 2
n o _ u s e
C 2 2 8
1 0 0 0 P ( B )
R 2 8 2
1 K
R23
1
3
3
R23
3
3
3
J20
1
0
R24
8
1
K
R 2 5 1
4 7 K
D G N D
+ 3 . 3 S
R 2 5 0
4 7 K
A 1 5 7 6 U B T L R
Q 2 1 0
C26
9
1/2
5
4 . 7 K
R 2 6 5
R 2 6 9
4 7 0
1 0 0 K
R 2 6 1
1 0 0 K
R 2 6 0
A 1 5 7 6 U B T L R
Q 2 0 9
C26
8
1/2
5
4 . 7 K
R 2 6 4
R 2 6 8
4 7 0
1 0 0 K
R 2 5 9
A 1 5 7 6 U B T L R
Q 2 0 8
C26
7
1/2
5
4 . 7 K
R 2 6 3
R 2 6 7
4 7 0
R28
9
10
K
+ 3 . 3 S
TP28
6
D G N D
ARC_M
T
ARC_N_IN
T
R23
0
3
3
ARC_N_RS
T
R 2 2 3
3 3 X 4
R 2 5 5
3 3 X 4
R23
6
3
3
ARC_I2S_SE
L
I2SBUF_EN_SE
L
R23
5
3
3
R 2 5 2
3 3
R 2 1 9
3 3
R 2 5 7
3 3 X 4
R 2 2 2
3 3 X 4
R24
7
33X
4
NCPU_ADT_MUT
E
CB2
2
5204
4
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
1
9
8
7
6
5
9
1
8
1
R22
8
10
0
R22
9
100X
4
C 2 2 1
n o _ u s e
R21
7
10
0
C 2 3 3
n o _ u s e
+3.3
S
L 2 0 3
no_us
e
+ 3 . 3 D A B
DAC_PO
N
10
K
R28
3
6.2
K
R27
9
18
K
R28
5
R28
4
no_us
e
R28
0
no_us
e
10
K
R28
6
4.7
K
R23
9
33
K
R24
1
1 . 0 K
R 2 3 2
R 2 1 5
1 0 0 K
+ 5 V I D
L 2 0 1
B K P 1 0 0 5 H S 6 8 0 - T
+ 3 . 3 M
+ 5 . 5 V
D G N D
R27
3
3.9
K
R25
4
5.6
K
J20
6
no_us
e
J 2 0 5
0
C 2 0 9
0 . 0 1 / 1 6 ( B )
R24
6
10
K
+ 3 . 3 S
TP30
3
D G N D
C 2 1 0
0 . 0 1 / 1 6 ( B )
VID_PO
N
CB2
7
5215
1
5
TP30
7
R23
8
10
K
D G N D
+ 3 . 3 S
C 2 8 3
0 . 0 1 / 1 6 ( B )
J20
7
no_us
e
212
5
R
2
9
4
no_us
e
R
2
9
3
no_us
e
R
2
9
0
no_us
e
CB2
1
5204
4
1
2
3
4
5
3
2
2
2
1
2
0
2
9
1
8
1
7
1
6
1
5
1
4
1
3
1
2
1
1
1
0
1
9
8
7
6
I C 2 3
M 9 5 2 5 6 - R D W 6 T P
1
S
2
Q
3
W
4
V S S
5
D
6
C
7
H O L D
8
V C C
C B 2 8
n o _ u s e
F M N 1 2 P S E
CB2
5
5215
1
DGN
D
I C 2 1
W 2 5 Q 3 2 F V S S I G
YJ303A
0
1
/ C S
2
D O ( I O 1 )
3
/ W P ( I O 2 )
4
G N D
5
D I ( I O 0 )
6
C L K
7
/ H O L D ( I O 3 )
8
V C C
I C 2 2
T M P M 4 6 2 F 1 5 F G ( A D
Y J 3 0 2 A 0
1
PM
3
2
PM
4
3
PM
5
4
DVDD
3
5
DVS
S
6
PD
0
7
PD
1
8
PD
2
9
PD
3
1
0
PD
4
1
1
PD
5
1
2
PD
6
1
3
PD
7
1
4
PD
8
1
5
PD
9
1
6
PD1
0
1
7
PD1
1
1
8
PD1
2
1
9
PD1
3
2
0
PD1
4
2
1
PD1
5
2
2
REGIN
1
2
3
REGOUT
1
2
4
RVDD
3
2
5
RVS
S
8 4
8 3
P G 9
8 2
P G 8
8 1
P G 7
4 5
N M I
4 6
X T 1
4 7
M O D E
4 8
X T 2
4 9
R E S E T
5 0
P M 1 1
5 1
5 2
5 3
5 4
5 5
5 6
5 7
5 8
5 9
P F 8
6 0
D V D D 3
6 1
D V S S
6 2
P F 9
6 3
P F 1 0
6 4
P F 1 1
6 5
9
6
9
7
9
8
9
9
10
0
10
1
10
2
10
3
10
4
10
5
PH1
4
10
6
PJ
0
10
7
10
8
PJ
2
10
9
11
0
11
1
RVDD
3
11
2
RVS
S
11
3
REGIN
2
11
4
REGOUT
2
11
5
11
6
11
7
PN
4
11
8
11
9
12
0
1 3 6
D V D D 3
1 3 7
D V S S
1 3 8
P B 0
1 3 9
P B 1
1 4 0
P B 2
1 4 1
P B 3
1 4 2
P B 4
1 4 3
P B 5
1 4 4
P B 6
1 4 5
P B 7
1 4 6
D V D D 3
1 4 7
D V S S
1 4 8
P B 8
1 4 9
P B 9
1 5 0
P C 0
1 5 1
P C 1
1 5 2
P C 2
1 5 3
P C 3
1 5 4
T E S T
1 5 5
P C 4
1 5 6
P C 5
1 5 7
P C 6
1 5 8
P C 7
1 5 9
P C 8
1 6 0
P C 9
2
6
REGOUT
3
2
7
PE
0
2
8
PE
1
2
9
PE
2
3
0
PE
3
3
1
PE
4
6 6
6 7
P E 5
6 8
P E 6
6 9
P E 7
7 0
7 1
D V D D 3
7 2
D V S S
1 6 1
P C 1 0
1 6 2
P C 1 1
1 6 3
P K 0
1 6 4
D V D D 3
1 3 3
1 3 4
P L 6
1 3 5
P L 7
3
2
DVS
S
8
9
AVREF
H
9
0
AVS
S
9
1
9
2
9
3
9
4
9
5
3
3
X
1
3
4
DVS
S
3
5
X
2
3
6
DVDD
3
3
7
3
8
PF
1
3
9
PF
2
4
0
7 3
7 4
P G 0
7 5
P G 1
7 6
P G 2
7 7
P G 3
7 8
P G 4
7 9
P G 5
8 0
P G 6
12
1
12
2
12
3
12
4
12
5
12
6
DVDD
3
12
7
DVS
S
12
8
PL
0
1 6 5
D V S S
1 6 6
P K 1
1 6 7
P K 2
1 6 8
P K 3
1 6 9
P K 4
1 7 0
P K 5
1 7 1
P K 6
1 7 2
P K 7
4
1
PM
7
4
2
4
3
PM
9
4
4
PM1
0
8 5
8 6
P N 0
8 7
P N 1
8 8
A V D D 3
12
9
PL
1
13
0
PL
2
13
1
PL
3
13
2
PL
4
1 7 3
1 7 4
1 7 5
1 7 6
t o 0 0 6 . s h t
( N E T W O R K )
FC
T
DIAG_CHEC
K
Part No.
Part Type
B l a n k p r o d u c t o f I C 2 1 i s a a l t e r n a t e o f
t w o p r o d u c t s b e l o w .
Vender
I C / C B / X L : 2 1 - 4 0
O H T E R : 2 0 1 - 4 0 0
D I G I T A L 2 : C P U
TO ROM Write
r
/ R E S
S W D _ S W V
D G N D
S W D _ I O
+ 3 . 3 M
D G N D
D G N D
S W D _ S C K
D G N D
/ B O O T
T X D
R X D
C P U R E S E T
D e l a y t i m e s e t t i n g
7 0 m s e c
F o r c e R E S E T
( 2 5 6 k b i t s )
E E P R O M
TO OPE(1)
TO MAIN(1)
( 1 0 0 5
0 . 5 % )
f o r
F A T E S T
t o O P E ( 2 )
+5.5
V
DGN
D
ACPWR_DE
T
+3.3
M
DGN
D
PR
Y
PR
Y
PS1_PR
T
+3.3
S
R_200_DE
T
DGN
D
THM
1
PS2_PR
T
+3.3
T
t o O P E ( 4 )
SC
L
Lc
h
Rc
h
N_RS
T
+3.3
T
SD
A
t o T U N E R P A C K
GN
D
N_IN
T
N
C
( 2 1 2 5 )
t o 0 0 5 . s h t
( P O W E R )
t o 0 0 4 . s h t
( D I R )
PS Protectio
n
t o 0 0 3 . s h t
( D S P 1 )
t o 0 0 3 & 4 . s h t
( D S P 1 & D I R )
t o 0 0 1 . s h t
( H D M I )
S T m i c r o
S - 2 5 C 2 5 6 A 0 I - T 8 T 1 U 4
R o h m
B R 2 5 G 2 5 6 F V T - 3
Y J 1 7 0 A 0
t o 0 0 4 . s h t
( D I R & D A C )
32Mbit
YE483B0
YH470A0
WINBOND
Spansion
W25Q32FVSSIG
S25FL132KOXMFI010
TB5OU
T
S C 6 T X D
S C 6 S C K
S C 6 R X D
T B 9 I N 0
S C 0 T X D
S C 0 R X D
S C 1 T X D
S C 1 R X D
I N T 8
C E C
I N T 9
I N T A
T B 2 I N 0
T B 3 I N 0
AIN
0
AIN
1
AIN
3
AIN
4
AIN
5
AIN
6
AIN
7
AIN
8
AIN
9
AIN1
0
AIN1
1
TBCIN
0
MOD
E
INT
E
INT
F
I2C2SD
A
I2C2SC
L
SP0FS
S
SP0D
O
SP0D
I
SP0CL
K
SP1FS
S
SP1D
O
SP1D
I
SP1CL
K
P L 5
S C 7 S C K
S C 7 R X D
S C 7 T X D
B O O T
SC4TX
D
SC4SC
K
D A B p o w e r
D I G I T A L B o a r d .
V I D E O p o w e r
D I G I T A L b o a r d .
TES
T
MIC_N_DE
T
FLD_MOS
I
FLD_N_RS
T
FLD_N_C
S
FLP_PO
N
STBY_LE
D
FLD_PO
N
KY_AD
1
VDL_R
A
PSW_N_DE
T
FLD_SC
K
KY_AD
2
DGN
D
ISEL_R
A
DGN
D
+5.5
V
+5.5
V
+3.3
M
VDL_R
B
DGN
D
ISEL_R
B
PS2_PR
T
DGN
D
VSEL
2
VSEL
1
+5VI
D
t o O P E ( 3 )
AMP_OL
V
I_PR
T
DC_PR
T
VOL_SC
K
VOL_MOS
I
MT_SU
R
MT_S
B
MT_S
W
THM
2
DGN
D
PS1_PR
T
SPRY_S
B
HPR
Y
HP_N_DE
T
TRANS_R
Y
AMP_LM
T
MT_3C
H
SPRY_SU
R
SPRY_3C
H
(100
5
0.5%
)
(100
5
0.5%
)
AIN
2
HWDE
T
V_N_FMUT
E
AIN1
2
AIN1
3
R X - V 5 8 3 / A 6 7 0 o n l y
REM_IN
1
S i d e A
M 9 5 2 5 6 - R D W 6 T P
S I I
1
2
3
4
1
2
3
1
2
3
4
5
6
7
1
2
3
4
1
2
3
4
5
6
7
8
9
IC23
: M95256-RDW6TP
256-Kbit serial SPI bus EEPROM
IC25
: SN74LVC1G17DCKR
Single schmitt-trigger buffer
1
2
3
5
4
NC
A
GND
VCC
Y
INPUT
A
OUTPUT
Y
L
H
L
H
IC24
: R3116N271A-TR-F
CMOS-based voltage detector IC
V
DD
2
3
GND
C
D
5
Delay
Circuit
Vref
1
OUT
Pin No.
1
2
3
4
5
Symbol
GND
OUT
NC
V
DD
C
D
Description
Output Pin (“L” at Detection, “Hi-Z” at Released)
Ground Pin
Connecting Pin for External Capacitor for Output Delay
No Connection
Input Pin
IC22
: TMPM462F15FG
CMOS 32-Bit Microcontroller
Cortex-M4F
NVIC
Debug
FLASH
1.5MB
or
1.0MB
RAM
192KB
BOOT
ROM
4KB
TMRB
SIO/UART
(16ch)
PORT
ADC
(20ch)
LVD
WDT
CG
EHOSC
IHOSC
IO Bus
X1
X2
ELOSC
XT1
XT2
APB
EBIF
RTC
Backup
RAM
1KB
UART
(2ch)
I2C
(5ch)
MPT
(2ch)
RMC
OFD
IHOSC
AHB to IO
Bridge
AHB to APB
Bridge
CEC
(6ch)
DMA
AHB-Lite
(unit A,B,C)
SSP
(3ch)
AHB Lite (max 120MHz)
IC21
: W25Q32FVSSIG
32 Mbit serial flash memory
003000h 0030FFh
002000h 0020FFh
001000h 0010FFh
Column Decode
And 256-Byte Page Buffer
Beginning
Page Address
Ending
Page Address
W
25
Q
32
FV
SPI
Command &
Control Logic
Byte Address
Latch / Counter
Status
Register
Write Control
Logic
Page Address
Latch / Counter
DO (IO
1
)
DI (IO
0
)
/CS
CLK
/WP (IO
2
)
High Voltage
Generators
xx0F00h xx0FFFh
•
Sector 0 (4KB)
•
xx0000h xx00FFh
xx1F00h xx1FFFh
•
Sector 1 (4KB)
•
xx1000h xx10FFh
xx2F00h xx2FFFh
•
Sector 2 (4KB)
•
xx2000h xx20FFh
•
•
•
xxDF00h xxDFFFh
•
Sector 13 (4KB)
•
xxD000h xxD0FFh
xxEF00h xxEFFFh
•
Sector 14 (4KB)
•
xxE000h xxE0FFh
xxFF00h xxFFFFh
•
Sector 15 (4KB)
•
xxF000h xxF0FFh
Block Segmentation
Data
Security Register 1 - 3
W
rite
Protect
Logic
and
Row
De
code
000000h 0000FFh
SFDP Register
00FF00h 00FFFFh
•
Block 0 (64KB)
•
000000h 0000FFh
•
•
•
0FFF00h 0FFFFFh
•
Block 15 (64KB)
•
0F0000h 0F00FFh
10FF00h 10FFFFh
•
Block 16 (64KB)
•
100000h 1000FFh
•
•
•
1FFF00h 1FFFFFh
•
Block 31 (64KB)
•
1F0000h 1F00FFh
20FF00h 20FFFFh
•
Block 32 (64KB)
•
200000h 2000FFh
•
•
•
3FFF00h 3FFFFFh
•
Block 63 (64KB)
•
3F0000h 3F00FFh
/HOLD (IO
3
) or
/RESET (IO
3
)
EEPROM
MICROPROCESSOR
No replacement part available.
サービス部品供給なし
RESISTOR
REMARKS
NO MARK
PARTS
NAME
CARBON
CARBON
METAL
METAL
METAL
FIRE
CEMENT
SEMI
FILM RESISTOR
FILM RESISTOR
OXIDE FILM RESISTOR
FILM RESISTOR
PLATE RESISTOR
PROOF CARBON FILM RESISTOR
MOLDED RESISTOR
VARIABLE RESISTOR
(P=5)
(P=10)
CHIP RESISTOR
REMARKS
CAPACITOR
PARTS NAME
NO
NO
MARK
MARK
ELECTROLYTIC
CAPACITOR
CERAMIC CAPACITOR
POLYESTER FILM CAPACITOR
POLYSTYRENE FILM CAPACITOR
MICA CAPACITOR
POLYPROPYLENE
FILM CAPACITOR
SEMICONDUCTIVE CERAMIC CAPACITOR
P
TANTALUM CAPACITOR
TUBULAR
S
CAPACITOR
CERAMIC
FILM
SULFIDE
POLYPHENYLENE
CAPACITOR
N O T I C E
U.S.A
G
CANADA
STANDARD
L
CHINA
AUSTRALIA
SINGAPORE
KOREA
GENERAL
U
C
T
A
K
R
JAPAN
(model)
B
BRITISH
J
SOUTH EUROPE
E
V
TAIWAN
F
RUSSIAN
P
LATIN AMERICA
S
BRAZIL
H
THAI
FLASH ROM
Page 112 H1
to MAIN (1)_CB225
Page 109 F8
to OPERATION (1)_CB402
(for factory)
Page 110 F7
to OPERATION (4)_CB521
Page 110 G7
to OPERATION (3)_CB501
to TUNER
Page 110 I3
to OPERATION (2)_W5403
to DIGITAL 4/6
to DIGITAL 3/6
to DIGITAL 5/6
to DIGITAL 6/6
to DIGITAL
3/6, 4/6
to DIGITAL 1/6
0V
0V
5.48 V
5.48 V
0V
3.29 V
3.24 V
0V
0V
3.29 V
3.29 V
3.28 V
0V
2.22 V
0V
0V
3.22 V
3.23 V
0V
3.29V
3.29V
3.29V
0V
0V
0V
-11.8V
2.93V
2.82V
2.94V
2.94V
0.65V
0V
3.29V
3.25V
3.28V
0V
0V
0V
3.24V
3.20V
0.94V
3.29V
0V
3.28V
2.62V
0.30V
2.62V
0V
5.49V
3.29V
0V
2.95V
3.49V
0.94V
2.12V
3.29V
0V
4.98V
0V
0V
0V
0V
0V
3.49V
0V
0V
3.49V
3.49V
3.29V
DIGITAL 2/6
Details of colored lines
Red / full line:
Power supply (+)
Red /dashed line: Power supply (-)
Orange:
Signal detect
Yellow:
Clock
Green:
Protection detect
Brown:
Reset signal
Blue:
Panel key input
★
All voltages are measured with a 10M
Ω
/V DC electronic voltmeter.
★
Components having special characteristics are marked
⚠
and must be replaced
with parts having specifications equal to those originally installed.
★
Circuit diagram is subject to change without notice.
●
電圧は、内部抵抗
10M
Ωの電圧計で測定したものです。
●
⚠印のある部品は、安全性確保部品を示しています。部品の交換が必要な場合、
パーツリストに記載されている部品を使用してください。
●
本回路図は標準回路図です。改良のため予告なく変更することがあります。
Summary of Contents for RX-V483/HTR-4071
Page 3: ...3 RX V483 HTR 4071 RX V483 HTR 4071 FRONT PANELS RX V483 HTR 4071 ...
Page 5: ...5 RX V483 HTR 4071 RX V483 HTR 4071 RX V483 K model RX V483 A model RX V483 B G models ...
Page 6: ...6 RX V483 HTR 4071 RX V483 HTR 4071 RX V483 F model RX V483 L model RX V483 H model ...
Page 7: ...7 RX V483 HTR 4071 RX V483 HTR 4071 RX V483 J model HTR 4071 A model HTR 4071 B G models ...
Page 8: ...8 RX V483 HTR 4071 RX V483 HTR 4071 HTR 4071 F model HTR 4071 L model ...
Page 9: ...9 RX V483 HTR 4071 RX V483 HTR 4071 REMOTE CONTROL PANEL RAV534 ...
Page 82: ...82 RX V483 HTR 4071 RX V483 HTR 4071 MEMO ...
Page 139: ...140 RX V483 HTR 4071 MEMO MEMO ...
Page 152: ...153 RX V483 HTR 4071 RX V483 HTR 4071 MEMO ...
Page 153: ...RX V483 HTR 4071 ...