Yamaha RX-V461 - AV Receiver, Service Manual

Page: 42 / 57

IC101
IC102
A
1
2
3
4
5
6
7
8
9
10
B C D E F G H I J K L M N
RX-V461/HTR-6040/DSP-AX461
69
★
All voltages are measured with a 10M
Ω
/V DC electronic voltmeter.
★
Components having special characteristics are marked s and must be replaced
with parts having specifications equal to those originally installed.
★
Schematic diagram is subject to change without notice.
DSP 1/6
SCHEMATIC DIAGRAMS
3.3 3.3
3.3 3.3
3.3 0
0.1 3.3
0
1
.5
1.9
1.5
3.3 1.5
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
3.3
0
0
0
0
0 0 0
0 0 0 0 0 0 0 0
0
0
0
3.3
1.4
3.3
3.3
3.3
3.3
3
1.9
1.9
3.3
1.7
3.3 3.3 0.1
3.3 3.3 0 1.4 0 1.4 1.4
1.7
1.7
1.7 1.7 1.6 1.7 1.7 1.7 1.7 1.7 3.3 1.3 0.1
3.3 3.3 3.3 3.3
0 0 0 0
0 0
0
0
3.4 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3 3.3
3.3
3.0
3.3
0
3.3
3.2 1.1 1.0 1.7 0.7 0.7 1.7 1.8 1.8 1.8 1.9 1.9 1.9 1.8 1.4
1.4 1.4
3.3
1.7
1.7
2.7
0.3
0.3
0.4
0.4
0.4
0.4
0.4
0.4
1.4
3.3
3.3
3.3
2.1
2.0
2.0
2.2
2.3
2.3
2.2
2.5
3.3
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
POINT 3 Pin 11 of IC101
IC101 : ADSP-BF531 CPU
Microprocessor
IC102 : BR25L320F-W EEPROM
SPI BUS 32 k-bit (4,096 x 8-bit) EEPROM
1 CS
INSTRUCTION DECODE
CONTROL CLOCK
GENERATION
INSTRUCTION
REGISTER
2 SO
3 WP
4
GND
8 Vcc
7 HOLD
6 SCK
5 SI
VOLTAGE
DETECTION
WRITE
INHIBITION
ADDRESS
REGISTER
DATA
REGISTER
8bit
READ/WRITE
AMP
32,768bit
EEPROM
STATUS REGISTER
ADDRESS
DECODER
HIGH VOLTAGE
GENERATOR
8bit
12bit 12bit
PPI/GPIO
L1 data
memory
JTAG test
and emulation
Voltage
regulator
L1 order
memory
Memory
management
unit
Core/System bus interface
Real time clock
UART port IrDA®
Serial port (2)
DMA controller
Boot ROM
SPI port
External port for flash
and SDRAM control
Event controller/
Core timer
Watch dock timer
Timer0, Timer1, Timer2
to DSP 6/6
to DSP 5/6
to DSP 2/6
to DSP 5/6
to DSP 4/6
to DSP 3/6
to DSP 2/6
to DSP 5/6
to DSP 6/6
to DSP 2/6
to DSP 3/6, 4/6
to DSP 3/6
to DSP 5/6
MICROPROCESSOR
EEPROM