Pin
No.
Port Name
Function Name
Related Power Supply
Detail of Function
ON
OFF
I/O
Logic
I/O
Logic
121
A4/[A4/D4]/AN2_4/
P2_4/N_CTS10/N_
RTS10
A[4]
B
B
u
s
O
Low
External b
u
s
122
A3/[A3/D3]/AN2_3/
P2_3/TXD9
A[3]
B
B
u
s
O
Low
External b
u
s
123
A2/[A2/D2]/AN2_2/
P2_2/RXD9
A[2]
B
B
u
s
O
Low
External b
u
s
124
A1/[A1/D1]/BC2/
[BC2/D1]/AN2_1/
P2_1/CLK9
A[1]
B
B
u
s
O
Low
External b
u
s
125
A0/[A0/D0]/BC0/
[BC0/D0]/AN2_0/
P2_0/N_CTS9/N_
RTS9
A[0]
B
B
u
s
O
Low
External b
u
s
126
D15/N_INT5/IIO0_7/
IIO1_7/P1_7
D[15]
B
B
u
s
I
---
External b
u
s
127
D14/N_INT4/IIO0_6/
IIO1_6/P1_6
D[14]
B
B
u
s
I
---
External b
u
s
128
D13/N_INT3/IIO0_5/
IIO1_5/P1_5
D[13]
B
B
u
s
I
---
External b
u
s
129
D12/IIO0_4/IIO1_4/
P1_4
D[12]
B
B
u
s
I
---
External b
u
s
130
D11/IIO0_3/IIO1_3/
P1_3
D[11]
B
B
u
s
I
---
External b
u
s
131
D10/IIO0_2/IIO1_2/
P1_2
D[10]
B
B
u
s
I
---
External b
u
s
132
D9/IIO0_1/IIO1_1/
P1_1
D[9]
B
B
u
s
I
---
External b
u
s
133
IIO0_0/IIO1_0/D8/
P1_0
D[8]
B
B
u
s
I
---
External b
u
s
134 AN0_7/D7/P0_7
D[7]
B
B
u
s
I
---
External b
u
s
135 AN0_6/D6/P0_6
D[6]
B
B
u
s
I
---
External b
u
s
136 AN0_5/D5/P0_5
D[5]
B
B
u
s
I
---
External b
u
s
137 AN0_4/D4/P0_4
D[4]
B
B
u
s
I
---
External b
u
s
138 P19_1
FPGA_N_CFG
O
L act
O
Low
FPGA nCONF
139 WR3/BC3/P11_4
FPGA_N_STA
I
L act
I
---
FPGA nSTATUS
140 P19_0
FPGA_CDONE
I
H act
I
---
FPGA CONF DONE
141
IIO1_3/N_RTS8/N_
CTS8/WR2/CS3/
P11_3
---
O
Low
O
Low
No
u
sed
142
IIO1_2/RXD8/CS2/
P11_2
NCPU_MISO
I
Data
O
Low
Network microprocessor UART reception data
143
IIO1_1/CLK8/CS1/
P11_1
SPRY_Z2&FP
O
H act
O
Low
SP relay Zone2 and Front Presence
144
IIO1_0/TXD8/CS0/
P11_0
NCPU_MOSI
O
Data
O
Low
Network microprocessor UART transmission data
145 P18_7
HPRY
O
H act
O
Low
HP relay
146 P18_6
MT_N_Z2
O
L act
O
Low
M
u
te Zone2 (Line o
u
t)
147 P18_5
---
O
H act
O
Low
No
u
sed
148 P18_4
MT_N_5CH
O
L act
O
Low
M
u
te 5ch (L, C, R, SRL, SRR Preo
u
t/Main amplifier inp
u
t)
149 P18_3
MT_N_SW
O
L act
O
Low
M
u
te S
u
bwoofer (Preo
u
t)
150 P18_2
MT_N_SB
O
L act
O
Low
M
u
te SB/BA/Z2/FP (Preo
u
t/Main amplifier inp
u
t)
151 AN0_3/D3/P0_3
D[3]
B
B
u
s
I
---
External b
u
s
152 AN0_2/D2/P0_2
D[2]
B
B
u
s
I
---
External b
u
s
153 AN0_1/D1/P0_1
D[1]
B
B
u
s
I
---
External b
u
s
154 AN0_0/D0/P0_0
D[0]
B
B
u
s
I
---
External b
u
s
155
IIO0_7/N_RTS6/
N_CTS6/N_SS6/
AN15_7/P15_7
SVID_DET
I
H act
I
---
S-video detect
156
IIO0_6/CLK6/
AN15_6/P15_6
HP_N_DET
I
L act
O
Low
Headphone detection
157
IIO0_5/RXD6/SCL6/
STXD6/AN15_5/
P15_5
EX1_N_CS
O
L act
O
Low
Expansion IO 1 chip select
75
RX-V671/HTR-6064/RX-A710
RX-V671/HTR-6064/
RX-A71
0
DRAFT
