Pin
No.
Port Name
Function Name
(P.C.B.)
I/O
Detail of Function
PO
WER ON
S
T
ANDB
Y
1
VREF
VREF
MCU
MCU AD standard voltage
2
AVCC
AVCC
MCU
MCU Microprocessor power s
u
pply
3
SIN4
E2R_MISO
SI
O
EEPROM synchronization data inp
u
t
4
SOUT4
FLD_MOSI
SO
O
FL driver / EEPROM synchronization data o
u
tp
u
t
5
CLK4
FLD_SCK
SO
O
FL driver / EEPROM synchrono
u
s clock o
u
tp
u
t
6
P9_4
OSDFS_N_RST
O
O
OSD Flash reset
7
DA0
AMP_LMT
DA
O
Limiter control o
u
tp
u
t
8
SOUT3
DSP_MOSI
SO
O
DSP, DIR, DAC synchronization data o
u
tp
u
t
9
SIN3
DSP_MISO
SI
I-
DSP, DIR, DAC synchronization data inp
u
t
10
CLK3
DSP_SCK
SO
O
DSP, DIR, DAC synchrono
u
s clock o
u
tp
u
t
11
P14_1
HDM_N_RST
O
O
HDMI RxTx reset
12
P14_0
TUN_N_RST
O
O
T
u
ner reset
13
BYTE
BYTE
MCU
MCU Data b
u
s width resh
u
ffling inp
u
t
14
CNVSS
E8A_CNVSS
MCU
MCU Processor mode select / Low: Single chip mode
15
P8_7
(no_
u
se)
O
O
16
P8_6
DIAG_FCT
O
O
Diag OK: O
u
tp
u
t High / Diag NG: O
u
tp
u
t Low (defa
u
lt)
17
/RESET
CPU_N_RST
MCU
MCU Reset inp
u
t
18
XOUT
XOUT
MCU
MCU Oscillation circ
u
it o
u
tp
u
t
19
VSS
DGND
MCU
MCU Microprocessor gro
u
nd
20
XIN
XIN
MCU
MCU Oscillation circ
u
it inp
u
t
21
VCC1
+3.3M
MCU
MCU Microprocessor power s
u
pply
22
CEC
HDM_CEC
IO
I+
Microprocessor CEC control
23
N_INT2
DSP_N_INT
IRQ
IRQ
Interr
u
pt inp
u
t from DSP
24
N_INT1
HDM_MUT
IRQ
I-
HDMI MUTE inp
u
t
25
N_INT0
HDM_INT
IRQ
I-
Interr
u
pt inp
u
t from HDMI RxTx
26
TA4IN
DIR_N_INT
TMR
O
DIR interr
u
pt inp
u
t
27
P8_0
(reserve)
28
P7_7
DIR_N_RST
O
O
DIR reset
29
P7_6
DIR_N_CS
O
O
DIR chip select
30
TA2IN
TUN_N_INT
TMR
O
T
u
ner GPIO2 inp
u
t
31
P7_4
(reserve)
O
O
NET SPI req
u
est
32
TA1IN
N_PDET
TMR
I+
AC power detection / L: Power down
33
P7_2
(reserve)
O
O
NET SPI ready
34
SCL2
HDM_SCL
SO
O
HDMI Rx/Tx I2C SCL o
u
tp
u
t
35
SDA2
HDM_SDA
SI
O
HDMI Rx/Tx I2C SDA inp
u
t and o
u
tp
u
t
36
TXD1
E8A_TXD
SO
I+
37
VCC1
+3.3M
MCU
MCU Microprocessor power s
u
pply
38
RXD1
E8A_RXD
SI
I+
39
VSS
DGND
MCU
MCU Microprocessor gro
u
nd
40
CLK1
E8A_SCLK
O
I+
41
P6_4
E8A_BUSY
I-
I-
42
SDA0
TUN_SDA
SI
O
T
u
ner I2C synchronization data inp
u
t and o
u
tp
u
t
43
SCL0
TUN_SCL
SO
O
T
u
ner I2C synchrono
u
s clock o
u
tp
u
t
44
P6_1
(no_
u
se)
O
O
45
P6_0
(no_
u
se)
O
O
46
P13_7
R2A_MOSI
O
O
Electronic vol
u
me flip-flop synchronization data o
u
tp
u
t
47
P13_6
R2A_SCK
O
O
Electronic vol
u
me flip-flop synchrono
u
s clock o
u
tp
u
t
48
P13_5
I_PRT
I-
I-
Overc
u
rrent protection detection
49
P13_4
TRANS_RY
O
O
50
P5_7
(no_
u
se)
O
O
63
RX-V373/HTR-3065
RX-V373/HTR-3065
Summary of Contents for HTR-3065
Page 4: ...HTR 3065 U C R K A B G F L S H models HTR 3065 T model 4 RX V373 HTR 3065 RX V373 HTR 3065 ...
Page 6: ...RX V373 K model RX V373 A model RX V373 B G F models 6 RX V373 HTR 3065 RX V373 HTR 3065 ...
Page 7: ...RX V373 L H models RX V373 J model HTR 3065 U C models 7 RX V373 HTR 3065 RX V373 HTR 3065 ...
Page 8: ...HTR 3065 K model HTR 3065 R S models HTR 3065 T model 8 RX V373 HTR 3065 RX V373 HTR 3065 ...
Page 111: ... CONFIGURING THE SYSTEM SETTINGS RX V373 HTR 3065 111 ...
Page 112: ... システム設定を変更する RX V373 HTR 3065 112 ...
Page 113: ...113 RX V373 HTR 3065 RX V373 HTR 3065 MEMO ...
Page 114: ...RX V373 HTR 3065 ...