Yamaha DVD-S1700, Service Manual

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SSCRXD
GPCI/O[17]
PM[15]
MEMCS[1]#
GPCI/O[18]
VDDP
MEMAD
[15,16]
SYSIND[1,0]
MEMAD[14]
GCLKSEL
MEMAD[13]
FCUIF[29]
MEMAD[12]
PLLCFGA
MEMDA[15]
FCUIF[28]
MEMAD[11]
PLLCFGP
MEMDA[7]
FCUIF[9]
GNDP
MEMAD[10]
FCUIF[20]
MEMDA[14]
FCUIF[27]
MEMAD[9]
FCUIF[19]
MEMDA[6]
FCUIF[8]
MEMAD[8]
FCUIF[18]
MEMDA[13,5]
FCUIF[26,7]
MEMAD[20]
MEMCS[2]#
GPCI/O[19]
VDDP
MEMDA[12]
FCUIF[25]
MEMWR#
FCUIF[0]
MEMDA[4]
FCUIF[6]
VDDC
MEMDA[11]
FCUIF[24]
MEMDA[3]
FCUIF[5]
MEMAD[19]
PLLSEL
GNDC
MEMDA[10]
FCUIF[23]
MEMAD[18]
GNDP
MEMDA[2]
FCUIF[4]
MEMAD[17]
MEMDA[9]
FCUIF[22]
MEMAD[7]
FCUIF[17]
MEMDA[1]
FCUIF[3]
MEMAD[6]
I
I/O
O
O
I/O
S
O
I
O
I
O
O
O
I
I/O
I/O
O
I
I/O
I/O
S
O
O
I/O
I/O
O
O
I/O
I/O
O
O
I/O
I/O
O
O
I/O
S
I/O
I/O
O
O
I/O
O
S
I/O
I/O
I/O
I/O
O
I
S
I/O
I/O
O
S
I/O
I/O
O
I/O
I/O
O
O
I/O
I/O
O
SSC data input
General purpose I/O, monitored/controlled by the microprocessor or DSP or FCU SW
Probe mux data output
PNVM/SRAM chip select (active low) output
General purpose I/O, monitored/controlled by the microprocessor or DSP SW
3.3 V digital periphery power supply
PNVM/SRAM address bus outputs
General purpose system configuration indication input / Level sampled during RESET
PNVM/SRAM address bus output
GCLKPOUT or GCLKA function selection / Level sampled during RESET
PNVM/SRAM address bus output
Flash card interface unit output signal
PNVM/SRAM address bus output
Audio PLL configuration input / Level sampled during RESET / In normal operation the pin must be low during RESET
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signal
PNVM/SRAM address bus output
Process PLL configuration input / Level sampled during RESET / In normal operation the pin must be low during RESET
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signals
Digital periphery ground of 3.3 V supply
PNVM/SRAM address bus output
Flash card interface unit output signal
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signal
PNVM/SRAM address bus outputs
Flash card interface unit output signal
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signals
PNVM/SRAM address bus outputs
Flash card interface unit output signal
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signals
PNVM/SRAM address bus outputs
PNVM/SRAM chip select (active low) output
General purpose I/O, monitored/controlled by the microprocessor or DSP SW
3.3 V digital periphery power supply
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signal
PNVM/SRAM write enable (active low) output
Flash card interface unit output signal
PNVM/SRAM bi-directional data bus
Flash card interface unit output signal
1.8 V digital core power supply
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signal
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signals
PNVM/SRAM address bus outputs
PLL frequency selection -108 MHz (low) or 135 MHz (high) / Level sampled during RESET
Digital core ground of 1.8 V supply
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signal
PNVM/SRAM address bus output
Digital periphery ground of 3.3 V supply
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signals
PNVM/SRAM address bus output
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signal
PNVM/SRAM address bus outputs
Flash card interface unit output signal
PNVM/SRAM bi-directional data bus
Flash card interface unit I/O signals
PNVM/SRAM address bus outputs
Pin Functions Direction Description No.