TECHNICAL NOTES
C I R CU I T D E S C R I P T I O N
The block diagram and circuit description to follow
will provide the owner with a better under
standing of the FT-208R transceiver. Please refer
to the schematic diagram for details.
RECEIVER
The VHF signal from the antenna is fed through a
lowpass filter and antenna diode switch to RF
amplifier Q104
(2SC2549),
which is protected by a
three-stage bandpass filter to minimize inter
modulation caused by strong out-of-band signals.
The amplified signal from Q104 is fed to the first
mixer, Q10 5
(2SC2786L),
where the RF signal is
mixed with the first IF signal delivered from the
PLL unit, producing a 1 6.9 MHz first IF. The IF
signal is passed through a monolithic crystal filter,
XF 101 , which has a 3 dB bandwidth of ± 1 4 kHz,
and is fed to the second mixer,
Q106 (2SC2787L).
Here the first IF signal is heterodyned with the
second local oscillator signal, 1 7.355 MHz (Model
A, D, E) or 1 6 .445 MHz (Model B, C), delivered
from Q10 7
(2SC2787L),
resulting in a second IF
of 455 kHz. The IF signal is passed through a
ceramic filter, CF 10 1 , amplified by
Q1os (2SC-
2787L),
then fed through another ceramic filter,
CF 102 . The highly filtered IF signal is then fed to
Q109
(MC33 57),
which functions as an IF amplifier,
limiter, discriminator, and squelch control. The
amplification and limiting process eliminates ampli
tude variations in the IF signal, which is then fed
to the discriminator section of Q 109 , where an
audio response is produced in accordance with a
corresponding frequency shift in the IF signal. The
audio signal is then amplified by Q 11 3
(2SC2785E),
Q1 14
(2SA1175E), Qus (2SC2120Y),
and
Q116
(2SA950Y).
The audio PA section delivers 500 mW
of audio output power to the speaker.
When no carrier is present in the 455 kHz IF, the
high frequency noise at the output of the dis
criminator is amplified by the noise amplifier
section of Q 109 . This amplified signal drives a
squelch switch in the same IC, which in turn biases
Q u8
(2SC2785E)
and
Q117 (2SA1175E)
such that
DC voltage is removed from AF amplifier
Q114
,
thus silencing the receiver.
2-2
When a carrier is present in the 455 kHz IF, the
noise is removed from the discriminator output,
and Q 114 is then biased for normal operation, thus
allowing receiver recovery. VR102 sets the squelch
sensitivity level. Scanning control voltages are also
provided by Q109 , allowing interactive operation
with the Central Processing Unit for control of the
SCAN STOP function.
TRANSMITTER
The transmitter produces a frequency modulated
signal. The audio input from the microphone or
DTMF encoder Q 304
(MK5087)
is amplified by
Q2 17
(µPC577H),
which also limits the maximum
amplitude of the audio input and filters out signal
components above the normal speech range. The
audio signal is then applied to varactor diode D209
(FC53),
which varies the frequency of a 1 6 .9 MHz
crystal oscillator, Q2 13
(2SC2786L).
This signal is
then delivered to the balanced mixer and amplifier
stages.
A portion of the output from VCO (Voltage
Controlled Oscillator) Q201
(2SK192Y)
is fed
through buffer amplifier Q202
(2SC2786L)
to PLL
(Phase Locked Loop) mixer Q20 3
(2SC2786L),
which is also supplied with a PLL local signal of
1 25 . 59 5 MHz (Model A, D, E) or 1 24.5875 MHz
(Model B, C) delivered from Q209
(2SC2786L).
This results in a 1 . 505-5. 500 MHz (Model A, D,
E) or 2 . 5 1 2 5 MHz-4.500 MHz (Model B), 2.5 1 25
MHz-6. 500 MHz (Model C) PLL IF signal. See
page 2-4 for Frequency Relationships.
The PLL IF signal is amplified by Q204 and Q20 5
(2SC2786L)
and then fed to
Q206 (µPD2819C).
This programmable divider divides the signal by a
factor of 30 1 - 1 1 00 (Model A, D , E), 20 1 -360
(Model B), 20 1 -520 (Model C), producing basic
5 kHz (Model A, D, E), 1 2. 5 kHz (Model B, C)
steps for the synthesizer. One section of
Q206
acts
as a 5.76 MHz (Model A, D, E) or 7.2 MHz
(Model B , C) oscillator, which, in tum, is divided
into 5 kHz ( 1 2.5 kHz) steps. The phase com
parator section of
Q206
then compares the phase of
the PLL IF signal with that of the PLL reference
signal, and any difference in phase produces an
error-correcting voltage, which is used to control
varactor diodes to lock the PLL onto the correct
frequency. This feedback system produces a highly
stable output signal.
Summary of Contents for FT-208R
Page 3: ......
Page 5: ......
Page 7: ......
Page 14: ......
Page 19: ......
Page 25: ......
Page 31: ......
Page 66: ...SECTION 4 REPAI R PARTS ORDERING FORMS 4 1 PARTS LIST 4 5...
Page 67: ......
Page 69: ...4 2...
Page 71: ...4 4...
Page 77: ...M EMO 4 1 0...
Page 78: ......
Page 79: ......
Page 80: ...YA E SU v E 3690 982AC820 5 N...