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11
Document MT0513P.C
© Xsens Technologies B.V.
User Manual MTi 1-series DK
Table 3. Switch positions to enable interfaces on Development Board
Interface
PSEL0
PSEL1
RS232
Comments
UART FD
0
0
0
When USB is detected, interface is USB
UART HD
1
0
0
USB
0
0
0
When USB is detected, interface is USB
I
2
C
1
1
0
When I
2
C interface is selected, it is required to
set the address on the 24-pins connector (see
MTi 1-series Data Sheet for the I
2
C-addresses
table)
SPI
0
1
0
RS232
1
0
1
When USB is detected, interface is USB
4.2 Pin Descriptions
Name
Type
Description
Power Interface
VDD
Power
Power supply voltage for sensing elements
VDDIO
Power
Digital I/O supply voltage
Controls
PSEL0
Selection pins
These pins determine the signal interface. See table below. Note that when the
PSEL0/PSEL1 is not connected, its value is 1. When PSEL0/PSEL1 is connected
to GND, its value is 0
PSEL1
nRST
Active low reset pin, connect to VDDIO if not used
Signal Interface
I2C_SDA
I
2
C interface
I
2
C serial data
I2C_SCL
I
2
C serial clock
ADD[0..2]
I
2
C address selection pins
SPI_nCS
SPI interface
SPI chip select
SPI_MOSI
SPI serial data input (slave)
SPI_MISO
SPI serial data output (slave)
SPI_SCK
SPI serial clock
RTS
UART
interface
Hardware flow control in UART full duplex mode (Ready-to-Send)
CTS
Hardware flow control in UART full duplex mode (Clear-to-Send)
nRE
Receiver control signal in UART half duplex mode
DE
Transmitter control signal in UART half duplex mode
UART-RX
Receiver data input
UART-TX
Transmitter data output
RS232-TX
RS232
interface
Receiver data input
RS232-RX
Transmitter data output
RS232-RTS
Hardware flow control in RS232 mode (Ready-to-Send) – required when UART is
set to Full duplex
RS232-CTS
Hardware flow control in RS232 mode (Clear-to-Send) – required when UART is
set to Full duplex
SYNC_IN
Sync interface SYNC_IN accepts a trigger which sends out the latest available data message
DRDY
Data ready
Data ready pin indicates that data is available (SPI / I
2
C)
Figure 7: Switch to
I
2
C interface and
VDDIO of 3.0V