XOCECO PH-42R6, Service Manual

Page: 33 / 42

XOCECO
N15
gm1601
1.0
CPU
203-L37R70-01DL
XIAMEN OVERSEAS CHINESE
ELECTRONIC CO., LTD.
TITLE:
DWG NO.
REV.
X18
FI-WE31P-HF
18
RB2+
11
RD1-
25
RD2+
4
RB1-
28
SDATA
17
RB2-
7
RC1-
24
RD2-
21
RC2+
14
GND
3
RA1+
2
RA1-
31
GND
10
RCLK1+
20
RC2-
13
GND
27
DISPEN
6
GND
30
SLE
19
GND
9
RCLK1-
23
RCLK2+
1
GND
26
GND
16
RA2+
5
RB1+
22
RCLK2-
12
RD1+
15
RA2-
29
SCLK
8
RC1+
Sheet 5 of 7
FSDATAU[26]
USB_POW
/FSRASU
FSDQMU1
FSDATA[7]
FSDATAU[29]
VRED[4]
FSDATAU[3]
FSDATAU[1]
FSDATAU[25]
/FSCASU
FSDQMU0
RXD
FSDATAU[30]
VRED[3]
VBLU[7]
FSDATAU[2]
FSDATAU[4]
PBIAS
FSDATAU[24]
TXA0-
FSDATAU[31]
VRED[2]
VBLU[1]
FSDATAU[5]
FSADDRU[3]
FSDATA[23]
DISP_EN
TXD
FSDATAU[13]
TXA0+
FSADDRU[0]
VBLU[0]
FSDATAU[6]
FSADDRU[2]
FSDATA[22]
HDMI(DVI)_CAB
FSDATAU[14]
FSADDR[10]
FSDQM[0]
TXA1-
OCMADDR[13]
SVCLK
FSDATAU[7]
FSADDRU[1]
FSDATA[21]
VGA_CAB
FSDATAU[15]
FSADDR[11]
TXA1+
FSADDR[5]
OCMADDR[14]
JTAG_TMS
FSADDRU[0]
FSDATA[20]
VGA/HDMI_SW
FSDATAU[16]
SHS
TCLK
OCMADDR[18]
TXA2-
FSDATA[6]
FSADDR[4]
OCMADDR[15]
FSDATA[10]
JTAG_TDI/SDA
FSDATA[18]
FSADDRU[11]
FSDATA[19]
FSDATAU[17]
FSADDRU[0-11]
SVS
OCMADDR[19]
FSBKSEL0
FSDATA[5]
FSDATA[24]
FSADDR[8]
FSDATA[9]
OCMADDR[16]
JTAG_TDO
FSDATA[17]
ADC_IN2
SHREF
FSADDR[7]
FSDATA[4]
FSDATA[25]
FSBKSEL1
FSDATA[8]
OCMADDR[17]
FSDATA[16]
SV[7]
FSADDR[9]
FSDATA[3]
FSDATA[26]
FSDATAU[15]
ODSEL2
ACS_RESET_HO
JTAG_TRST
FSDATAU[23]
SV[6]
FSADDRU[7]
FSDATA[2]
FSDATA[27]
FSDATAU[14]
VGRN[7]
FSDATAU[22]
FSADDRU[1]
FSADDRU[9]
XTAL
FSDATAU[13]
VGRN[6]
FSDATA[28]
FSDATAU[21]
FSADDRU[2]
RESET_OUT
FSDATAU[3]
FSDATA[29]
FSDATAU[8]
VGRN[5]
VBLU[6]
TXB0-
FSADDRU[3]
FSDQM[2]
JTAG_TCK/SCL
FSDATAU[2]
FSDATA[30]
FSDATA[15]
FSDATAU[9]
VGRN[4]
VBLU[5]
TXB0+
TXB2+
FSADDRU[6]
VRED[1]
POWER_OFF
MSTR_SCL
FSADDRU[4]
MSTR_SCL
ADC_IN3
FSDATAU[1]
FSDATA[31]
FSDATA[14]
FSDATAU[10]
VBLU[4]
FSDATA[0-31]
TXB1-
TXBC-
FSADDRU[7]
VRED[0]
VGRN[3]
FSADDRU[5]
MSTR_SDA
FSDATAU[0]
FSDATAU[31]
FSDATA[13]
FSDATAU[11]
VBLU[3]
TXB1+
TXBC+
FSADDRU[8]
VGRN[2]
FSDATA[1]
FSDATAU[30]
/ROM_CS
FSDATA[12]
FSDATAU[12]
VBLU[2]
POWER_RET
FSADDRU[8]
TXB2-
TXB3-
OCMDATA[1]
FSADDRU[9]
VGRN[1]
FSDATA[0]
OCMDATA[0]
/OCM_RE
FSDATA[11]
TXB3+
FSADDRU[10]
FSADDRU[10]
VGRN[0]
FSDATAU[7]
OCMADDR[0]
/OCM_WE
FSDATAU[18]
FSADDRU[6]
VRED[7]
FSADDR[0]
FSDATAU[6]
OCMADDR[1]
OCMADDR[3]
FSDQM[1]
FSDATAU[19]
MSTR_SDA
FSADDRU[5]
FSDATAU[20]
OCMADDR[4]
FSADDR[1]
FSDATAU[5]
OCMADDR[2]
FSDATAU[20]
TXA2+
FSADDRU[11]
FSADDRU[4]
FSDATAU[19]
OCMADDR[5]
FSADDR[2]
FSDATAU[4]
FSDQM[3]
FSDATAU[21]
TXAC-
FSADDR[6]
FSDATAU[18]
OCMADDR[6]
FSADDR[3]
FSDATAU[22]
TXAC+
FSDATAU[17]
FSDQS
OCMADDR[7]
OCMADDR[9]
SV[5]
TXA3-
OCMADDR[8]
FSDATAU[12]
FSDATAU[16]
OCMDATA[3]
OCMADDR[10]
SV[4]
FSDATAU[23]
FSCLK-
TXA3+
FSDATAU[11]
OCMDATA[4]
VDE
OCMADDR[11]
SV[3]
FSDATAU[24]
FSDATAU[29]
FSBKSELU1
FSCLK+
/FSWEU
FSDATAU[10]
OCMDATA[5]
FLS_DET
OCMADDR[12]
SV[2]
FSDATAU[25]
SV[0]
FSDATAU[28]
FSBKSELU0
FSDQMU3
FSDATAU[9]
OCMDATA[6]
SV[1]
FSDATAU[26]
VRED[6]
FSDATAU[0-31]
FSDATAU[27]
FSCKEU
FSDQMU2
FSDATAU[8]
OCMDATA[7]
FSDATAU[27]
FSDATAU[28]
VRED[5]
FSDATAU[0]
SOFT_SDA
SOFT_SCL
RGB/YPbPr_SEL
HP_VOL
BUFFER_OE
ADC_IN2
+5VSTB
SDET
HP_SW
AMUTE
SDET
POWER_KEY
BLUE+
+3.3V_I/O_BGA
C201 100n
SV[7-0]
+3.3V_DIG
C171 100n
+1.8V_DVI
SDA_OUT
FSDQMU0
C156
100n
R113
2K
X23
1
2
3
FLS_DET
IR_IN
/FSCASU
C219
100p
TXA3-
R108
2.2K
C178 100n
N16
AT24LC32A/SN
1
A0
2
A1
3
A2
4
GND
5
SDA
6
SCL
7
WP
8
Vcc
C229 100n
TXB3+
N14
LM809
Vcc
GND
RESET
VGA_SDA
C193 100n
C194 100n
R107
2.2K
+3.3V_DIG
C148
100n
R243
10K
TP4
+3.3V_LBADC
C200
100n
C208
100n
C230 100n
C188
47uF
10V
C160 100n
C161 100n
C215
100n
+3.3V_DIG
C173
100n
TP8
C220
100n
TXAC-
SCL_OUT
TXA3+
SCL_OUT
FSDQMU1
C211
100n
C199 100n
V7
BSS138LT1
G
D
S
TXBC-
C181 100n
+3.3V_I/O_BGA
G4
14.31818MHz
R145
22
C180 100n
OCMDATA[0-7]
C192 100n
R124
100
R127
240
TP12
C222
100n
C159 100n
+3.3V_ADC
VRED[7-0]
R117
10K
C164 100n
C162
100n
FSADDR[0-11]
R134
47K
TXB3-
C207
100n
R122
10K
FSCKEU
+3.3V_DVI
V4
BC847AW
C191
100n
C174 100n
+1.8V_ADC
C177 100n
+3.3V_DIG
GREEN+
+1.8V_CORE
R137
47K
FSBKSELU0
/RESET
FSVREF
C149 100n
TXAC+
IN
PBIAS
FSCKEU
FSBKSELU1
TXA1+
+3.3V_DIG
TXBC+
+3.3V_LVDS
TXB2+
FSDATA[0-31]
+3.3V_LVDS
R146
22
R133
2.7K
DISP_EN XREF28
C183
100n
MSTR_SCL
C202
100n
+1.8V_ADC
BLUE-
TXB2-
C166
100n
C203 100n
OCMADDR[0-19]
+3.3V_DIG
R121
10K
FSBKSELU0
C217 100n
C226
100n
/ROM_CS
/FSRASU
TP10
+3.3V_LVDSA
A1
NO_CONNECTA1 NO_CONNECTA1
A21
VGRN7 VGRN7
A22
VGRN3 VGRN3
A23
VGRN0 VGRN0
A24
VBLU5 VBLU5
A25
VBLU1 VBLU1
A26
PPWR PPWR
B1
BLUE- BLUE-
B2
BLUE+ BLUE+
B3
ADC_3.3B3
B4
ADC_DGNDB4
B5
DVI_GNDB5DVI_GNDB5
B6
RXC- RXC-
B7
DVI_GNDB7DVI_GNDB7
B8
RX0- RX0-
B9
RX1- RX1-
B10
RX2- RX2-
B11
REXT REXT
B12
LBADC_IN2 LBADC_IN2
B13
D_GNDB13
B18
VRED5 VRED5
B19
VRED1 VRED1
B20
VODD VODD
B21
VGRN6 VGRN6
B22
VGRN2 VGRN2
B23
VBLU7 VBLU7
B24
VBLU4 VBLU4
B25
VBLU0 VBLU0
B26
PBIAS PBIAS
C1
GREEN- GREEN-
C2
GREEN+ GREEN+
C3
SOG SOG
C4
ADC_AGNDC4
C5
NO_CONNECTC5 NO_CONNECTC5
C6
DVI_1.8C6
C7
DVI_GNDC7DVI_GNDC7
C8
DVI_1.8C8
C11
DVI_1.8C11
C12
LBADC_IN1 LBADC_IN1
C13
LBACD-33LBACD-33
C14
SVHSYNC SVHSYNC
C15
SVDATA4 SVDATA4
C16
SVDATA0 SVDATA0
C17
VRED7 VRED7
C18
VRED4 VRED4
C19
VRED0 VRED0
C20
VVS VVS
C21
VGRN5 VGRN5
C22
VGRN1 VGRN1
C23
VBLU6 VBLU6
C24
VBLU3 VBLU3
C25
PWM1 PWM1
C26
PWM0 PWM0
D1
RED- RED-
D2
RED+ RED+
B14
SVVSYNC SVVSYNC
B16
SVDATA1 SVDATA1
B17
VCLAMP VCLAMP
C9
DVI_1.8C9
C10
DVI_1.8C10
B15
SVDATA5 SVDATA5
D3
ADC_3.3D3
D4
ADC_AGNDD4
D5
NO_CONNECTD5 NO_CONNECTD5
D6
DVI_1.8D6
A18
VRED6 VRED6
A5
ADC_DGNDA5
A6
RXC+ RXC+
A9
RX1+ RX1+
A3
ADC_1.8A3
A7
DVI_GNDA7DVI_GNDA7
A17
SVDV SVDV
A14
SVODD SVODD
A11
DVI_GNDA11DVI_GNDA11
A20
VCLK VCLK
A15
SVDATA6 SVDATA6
A13
D_GNDA13
A16
SVDATA2 SVDATA2
A4
ADC_1.8A4
A12
LBADC_IN3 LBADC_IN3
A19
VRED2 VRED2
A2
ADC_3.3A2
A8
RX0+ RX0+
A10
RX2+ RX2+
D7
DVI_GNDD7DVI_GNDD7
D8
DVI_1.8D8
D9
DVI_1.8D9
D10
DVI_1.8D10
D11
DVI_GNDD11DVI_GNDD11
D12
LBADC_RETURN LBADC_RETURN
D13
LBADC_GNDLBADC_GND
D14
SVDATA7 SVDATA7
D15
SVDATA3 SVDATA3
D16
SVCLK SVCLK
D17
IO_3.3D17IO_3.3D17
D18
VRED3 VRED3
D19
VHS_CSYNC VHS_CSYNC
D20
VDV VDV
D21
VGRN4 VGRN4
D22
IO_3.3D22
D23
IO_3.3D23
E1
ADC_AGNDE1
E2
ADC_AGNDE2
E3
ADC_3.3E3
E4
ADC_AGNDE4
E23
FS_2.5E23
E24
FSDATA0 FSDATA0
E25
FSDATA1 FSDATA1
E26
FSDATA2 FSDATA2
F1
NO_CONNECTF1 NO_CONNECTF1
F2
VDDA33_PLLVDDA33_PLL
F3
VSSA33_RPLLVSSA33_RPLL
F4
VDDA33_RPLLVDDA33_RPLL
F23
FS_2.5F23
F24
FSDATA29 FSDATA29
F25
FSDATA30 FSDATA30
F26
FSDATA31 FSDATA31
G1
VDDA33_FPLLVDDA33_FPLL
G2
VSSD33_PLLVSSD33_PLL
G3
TCLK TCLK
G4
XTAL XTAL
G23
FSDATA27 FSDATA27
G24
FSDATA4 FSDATA4
G25
FSDATA28 FSDATA28
G26
FSDATA3 FSDATA3
H1
VDDA33_SDDSH1
H2
VSSA33_SDDSVSSA33_SDDS
H3
VDDA33_SDDSH3
H4
VSSA33_FPLLVSSA33_FPLL
H23
FS_2.5H23
H24
FSDATA6
FSDATA6
H25
FSDATA26 FSDATA26
H26
FSDATA5 FSDATA5
J1
VDDA33_DDDSJ1
J2
VSSA33_DDDSVSSA33_DDDS
J3
VDDA33_DDDSJ3
J4
VSSD33-SDDSVSSD33-SDDS
J23
FS_2.5J23
J24
FSVREFJ24
J25
FSDATA7 FSDATA7
J26
FSDATA25 FSDATA25
K1
RESET RESET
K2
ACS_RSET_HD ACS_RSET_HD
K3
NO_CONNECTK3 NO_CONNECTK3
K4
VSSD33_DDDSVSSD33_DDDS
K23
VDDA18_DLLVDDA18_DLL
K24
FSDATA24 FSDATA24
K25
VSSA18_DLLVSSA18_DLL
K26
FSVREFVSSK26
L1
OCM_INT2 OCM_INT2
L2
OCM_INT1 OCM_INT1
L3
ABSYNC ABSYNC
L4
ANSYNC ANSYNC
L11
CORE_1.8L11
L12
D_GNDL12
L13
D_GNDL13
L14
D_GNDL14
L15
D_GNDL15
L16
CORE_1.8L16
L23
FS_2.5L23
L24
FSDATA15 FSDATA15
L25
FSDATA16 FSDATA16
L26
FSDQS FSDQS
M1
OCM_UDO OCM_UDO
M2
OCM_UDI OCM_UDI
M3
IR0IR0
M4
IR1 IR1
M11
D_GNDM11
M12
D_GNDM12
M13
D_GNDM13
M14
D_GNDM14
M15
D_GNDM15
M16
D_GNDM16
M23
FS_2.5M23
M24
FSDATA18 FSDATA18
M25
FSDATA14 FSDATA14
M26
FSDATA17 FSDATA17
N1
VGA_SDA VGA_SDA
N2
VGA_SCL
VGA_SCL
N3
DVI_SDA DVI_SDA
N4
DVI_SCL DVI_SCL
N11
D_GNDN11
N12
D_GNDN12
N13
D_GNDN13
N14
D_GNDN14
N15
D_GNDN15
N16
D_GNDN16
N23
FSDATA20 FSDATA20
N24
FSDATA12 FSDATA12
N25
FSDATA19 FSDATA19
N26
FSDATA13 FSDATA13
P1
OCM_CS1 OCM_CS1
P2
OCM_CS2 OCM_CS2
P3
MSTR_SDA MSTR_SDA
P4
MSTR_SCL MSTR_SCL
P11
D_GNDP11
P12
D_GNDP12
P13
D_GNDP13
P14
D_GNDP14
P15
D_GNDP15
P16
D_GNDP16
P23
FS_2.5P23
P24
FSDATA10 FSDATA10
P25
FSDATA21 FSDATA21
P26
FSDATA11 FSDATA11
R1
ROM_CS ROM_CS
R2
OCM_RE OCM_RE
R3
OCM_WE OCM_WE
R4
EXTCLK EXTCLK
R11
D_GNDR11
R12
D_GNDR12
R13
D_GNDR13
R14
D_GNDR14
R15
D_GNDR15
R16
D_GNDR16
R23
FS_2.5R23
R24
FSDATA23 FSDATA23
R25
FSDATA9 FSDATA9
R26
FSDATA22 FSDATA22
T1
OCMADDR17 OCMADDR17
T2
OCMADDR18 OCMADDR18
T3
OCMADDR19 OCMADDR19
T4
OCM_CS0 OCM_CS0
T11
CORE_1.8T11
T12
D_GNDT12
T13
D_GNDT13
T14
D_GNDT14
T15
D_GNDT15
T16
CORE_1.8T16
T23
FS_2.5T23
T24
FSDQM3 FSDQM3
T25
FSDQM0 FSDQM0
T26
FSDATA8 FSDATA8
U1
OCMADDR13 OCMADDR13
U2
OCMADDR14 OCMADDR14
U3
OCMADDR15 OCMADDR15
U4
OCMADDR16 OCMADDR16
U23
FSCLKn FSCLKn
U24
FSCLKp FSCLKp
U25
FSDQM1 FSDQM1
U26
FSDQM2 FSDQM2
V1
OCMADDR9 OCMADDR9
V2
OCMADDR10 OCMADDR10
V3
OCMADDR11 OCMADDR11
V4
OCMADDR12 OCMADDR12
V23
FS_2.5V23
V24
FSRAS FSRAS
V25
FSCAS FSCAS
V26
FSWE FSWE
W1
OCMADDR6
OCMADDR6
W2
OCMADDR7 OCMADDR7
W3
OCMADDR8 OCMADDR8
W4
IO_3.3W4
W23
FS_2.5W23
W24
FSVREFVSSW24
W25
FSVREFW25
W26
FSCKE FSCKE
Y1
OCMADDR3 OCMADDR3
Y2
OCMADDR4 OCMADDR4
Y3
OCMADDR5 OCMADDR5
Y4
IO_3.3Y4
Y23
FS_2.5Y23
Y24
FSADDR8 FSADDR8
Y25
FSBKSEL0 FSBKSEL0
Y26
FSBKSEL1 FSBKSEL1
AA1
OCMADDR0 OCMADDR0
AA2
OCMADDR1 OCMADDR1
AA3
OCMADDR2 OCMADDR2
AA4
IO_3.3AA4
AA23
FS_2.5AA23
AA24
FSADDR5 FSADDR5
AA25
FSADDR6 FSADDR6
AA26
FSADDR7 FSADDR7
AB1
OCMDATA13 OCMDATA13
AB2
OCMDATA14 OCMDATA14
AB3
OCMDATA15 OCMDATA15
AB4
IO_3.3AB4
AB23
FS_2.5AB23
AB24
FSADDR11 FSADDR11
AB25
FSADDR9 FSADDR9
AB26
FSADDR4 FSADDR4
AC1
OCMDATA10 OCMDATA10
AC2
OCMDATA11 OCMDATA11
AC3
OCMDATA12 OCMDATA12
AC4
IO_3.3AC4
AC5
GPIO_G09_B2 GPIO_G09_B2
AC6
IO_3.3AC6
AC7
DCLK DCLK
AC8
IO_3.3AC8
D26
PWM2 PWM2
D24
VBLU2 VBLU2
D25
OCM_TIMER1 OCM_TIMER1
AC9
GPIO_G07_B2 GPIO_G07_B2
AC10
IO_3.3AC10
AC11
LVDS_SHIELD[1] LVDS_SHIELD[1]
AC12
LVDSB_3.3AC12
AC13
LVDSB_GNDAC13
AC14
LVDSB_GNDAC14
AC15
LVDSB_GNDAC15
AC16
OEXTR OEXTR
AC17
NO_CONNECTAC17 NO_CONNECTAC17
AC18
GPIO_G06_B0 GPIO_G06_B0
AC19
VSSA33A_LVDSAC19
AC20
VSSA33A_LVDSAC20
AC21
LVDSA_3.3AC21
AC22
LVDSA_3.3AC22
AC23
FS_2.5AC23
AC24
FSADDR2 FSADDR2
AC25
FSADDR3 FSADDR3
AC26
FSADDR10 FSADDR10
AD1
OCMDATA9 OCMDATA9
AD2
OCMDATA6 OCMDATA6
AD3
OCMDATA3 OCMDATA3
AD4
OCMDATA0 OCMDATA0
AD5
GPIO_G09_B3 GPIO_G09_B3
AD6
GPIO_G08_B0/JTAG_CLK GPIO_G08_B0/JTAG_CLK
AD7
GPIO_16
GPIO_16
AD8
GPIO_G08_B5/JTAG_RESET GPIO_G08_B5/JTAG_RESET
AD9
GPIO_G07_B3 GPIO_G07_B3
AD10
GPIO_G07_B6 GPIO_G07_B6
AD11
LVDS_SHIELD[2] LVDS_SHIELD[2]
AD12
LVDSB_3.3AD12
AD13
LVDSB_3.3AD13
AD14
LVDS_SHIELD[5] LVDS_SHIELD[5]
AD15
D_GNDAD15 D_GNDAD15
AD16
GPIO_15 GPIO_15
AD17
VSSD33_LVDSVSSD33_LVDS
AD18
GPIO_G06_B1 GPIO_G06_B1
AD19
VSSA33A_LVDSAD19
AD20
LVDSA_3.3AD20
AD21
GPIO_G05_B0 GPIO_G05_B0
AD22
GPIO_G05_B3 GPIO_G05_B3
AD23
GPIO_G04_B0 GPIO_G04_B0
AD24
GPIO_G04_B1 GPIO_G04_B1
AD25
FSADDR0 FSADDR0
AD26
FSADDR1 FSADDR1
AE1
OCMDATA8 OCMDATA8
AE2
OCMDATA5 OCMDATA5
AE3
OCMDATA2 OCMDATA2
AE4
GPIO_G09_B0 GPIO_G09_B0
AE5
GPIO_G09_B4 GPIO_G09_B4
AE6
GPIO_GO8_B1/JTAG_MODE GPIO_GO8_B1/JTAG_MODE
AE7
GPIO_G08_B3 GPIO_G08_B3
AE8
GPIO_G07_B0 GPIO_G07_B0
AE9
GPIO_G07_B4 GPIO_G07_B4
AE10
GPIO_G07_B7 GPIO_G07_B7
AE11
LVDS_SHIELD[3] LVDS_SHIELD[3]
AE12
BC+ BC+
AE13
LVDS_SHIELD[4] LVDS_SHIELD[4]
AE14
B2- B2-
AE15
B1- B1-
AE16
B0- B0-
AE17
VDDD33_LVDSVDDD33_LVDS
AE18
GPIO_G06_B2 GPIO_G06_B2
AE19
A3+ A3+
AE20
AC+ AC+
AE21
A2+ A2+
AE22
A1+ A1+
AE23
A0+ A0+
AE24
GPIO_G04_B2 GPIO_G04_B2
AE25
GPIO_G04_B6 GPIO_G04_B6
AE26
GPIO_G04_B7 GPIO_G04_B7
AF1
OCMDATA7 OCMDATA7
AF2
OCMDATA4 OCMDATA4
AF3
OCMDATA1 OCMDATA1
AF4
GPIO_G09_B1 GPIO_G09_B1
AF5
GPIO_G09_B5 GPIO_G09_B5
AF6
GPIO_G08_B2/JTAG_TDI GPIO_G08_B2/JTAG_TDI
AF7
GPIO_G08_B4/JTAG_TDO GPIO_G08_B4/JTAG_TDO
AF8
GPIO_G07_B1 GPIO_G07_B1
AF9
GPIO_G07_B5 GPIO_G07_B5
AF10
LVDS_SHIELD[0] LVDS_SHIELD[0]
AF11
B3+ B3+
AF12
B3- B3-
AF13
BC- BC-
AF14
B2+ B2+
AF15
B1+ B1+
AF16
B0+ B0+
AF17
GPIO_14 GPIO_14
AF18
GPIO_G06_B3 GPIO_G06_B3
AF19
A3- A3-
AF20
AC- AC-
AF21
A2-
A2-
AF22
A1- A1-
AF23
A0- A0-
AF24
GPIO_G04_B3 GPIO_G04_B3
AF25
GPIO_G04_B4 GPIO_G04_B4
AF26
GPIO_G04_B5 GPIO_G04_B5
L10
D_GNDL10
M10
D_GNDM10
N10
D_GNDN10
P10
D_GNDP10
R10
D_GNDR10
T10
D_GNDT10
T17
CORE_1.8T17
R17
D_GNDR17
P17
D_GNDP17
N17
D_GNDN17
M17
D_GNDM17
L17
D_GNDL17
K11
CORE_1.8K11
K12
D_GNDK12
K13
D_GNDK13
K14
D_GNDK14
K15
D_GNDK15
K16
CORE_1.8K16
K10
CORE_1.8K10
K17
CORE_1.8K17
U11
CORE_1.8U11
U12
D_GNDU12
U13
D_GNDU13
U14
D_GNDU14
U15
D_GNDU15
U16
CORE_1.8U16
U10
CORE_1.8U10
U17
CORE_1.8U17
AHS
VBLU[7-0]
PWM3
+3.3V_LVDSA
/FSRASU
R143
22
R153
22
+3.3V_DVI
HS_COUNTER
R144
22
SVS
R244
10K
C210 100n
C213 100n
HD/USB_SEL
IN
R128
10K
V3
BC847AW
TXB1+
C147 22uF
10V
C151
47uF
10V
/USB_POW
+3.3V_PLL
TXAC-
C204
100n
C157 100n
C155 47uF
10V
/FSRAS
R154
22
IR_IN
+3.3V_LVDSB
MSTR_SDA
R109
10K
+3.3V_LVDSB
SOG
+3.3V_DVI
TXA2+
+3.3V_PLL
C179
100n
R142
22
POWER_OFF
R241
10K
TXA2-
R130
3.3K
FSDQMU0
V8
BSS138LT1
G
D
S
C209 100n
C167 100n
VCLK
C212
100n
C218
1u
FSBKSEL1
SDA_OUT
TXA1-
RESET_OUT
SHS
TXA0-
C145
47uF
10V
+1.8V_DVI
C195 100n
TXB0+
+3.3V_PLL
TXB1-
C176 100n
C221 100n
C182 100n
IN
R125
3.3K
TP9
R110
10K
TXA3-
DVIRX0-IN
VVS
/FSCAS
VGRN[7-0]
RESET_OUT
TP7
DVI_SCL
C186 100n
R129
33
/FSCASU
MSTR_SDA
+3.3V
VGA/HDMI_SW
C189 100n
TXA2-
C152
47uF
10V
+3.3V_DIG
R131
22
TP11
FSCLK+
C146 47uF
10V
TXA2+
FSCKE
R136
47K
+3.3V
DVIRXC-IN
C216
100n
C170
100n
TXA3+
VDE
R155
22
C172 100n
FSBKSEL0
SCL_OUT
RGB/YPbPr_SEL
TXA0+
HDMI(DVI)_CAB
C214 100n
+3.3V_SW
C228 100n
C206 100n
+1.8V_CORE
C224
22p
DVIRX1-IN
/FSWE
TXAC+
GREEN-
TXB0-
C225
100n
R140
10K
R157
22
DVI_SDA
AVS
FSDQMU1
/OCM_WE
ODSEL2
/FSWEU
C163 100n
C227
22p
PWM3
VHS
R147
22
SDA_OUT
R118
10K
TP13
R114
10K
R126
10K
V18
BC847AW
DVIRX2-IN
+2.5V_DDR
TP6
+2.5V_DDR
RED-
R116
10K
FSCLK-
VGA_CAB
V9
BC847AW
C197
100n
R242
2.2K
R141
22
SVCLK
TXA0-
R152
22
FSDQMU3
/USB_POW
IN
FSVREF
C158
100n
C190 100n
FSDQM[0-3]
R112
100
+3.3V_I/O_BGA
D8 LL4148
R148
22
C168 100n
R132
2.7K
FSDQMU3
TXA1+
C153
47uF
10V
FSBKSELU1
MSTR_SCL
C231 100n
FSDQMU2
C187 100n
C198 100n
TXA0+
FSDQS
+3.3V_PLL
SHREF
R156
22
PWM0
C150 47uF
10V
+3.3V
RED+
C205 100n
X14
CON-02-2.54
1
1
2
2
V6
BSS138LT1
G
D S
TP5
HDMI_RST
C154
47uF
10V
/FSWEU
C196 100n
C169 100n
C185
100n
R138
10K
C184 100n
+3.3V_ADC
VGA_SCL
L25
STPB3216-380PT
R139
47K
C175
100n
C223 100n
/OCM_RE
R135
2.7K
FSDQMU2
TXA1-
C165
100n
SOFT_SDA
SOFT_SCL
SOFT_SDA
SOFT_SCL
X12
1
2
3
4
X13
1
2
3
4
X11
1
2
3
4
BUFFER_OE
R247 2.2K
R246
0
MUTE
R250
0
D10
LL4148
DISP_EN
R253
1K
R254
100
R255
100
MSTR_SDA
MSTR_SCL
+5STB
+5VSTB
+5VSTB
+5VSTB
+5VSTB
+5VSTB
POWER_RET
R261
0
R262
0
+3.3V
YUV_SW
IR_IN
X15
TJC10-08A
1
2
3
4
5
6
7
8
SDET
RESET_OUT
V21
BC847AW
V22
BC847AW
R267
4.7K
R268 4.7K
R266
1K
R265
1K
+5V
+5V
MUTE
MUTE
POWER_KEY
SDET
X10
TJC10-06A
1
2
3
4
5
6
+5VSTB
POWER_KEY
ADC1_RETURN
ADC2_RETURN
2
2
2
2
GPROBE
1
1
2
1
1
1
1
7
1
1
1
1
4
1
1
1
2
1
4
2
4
4
1
HDMI
1
4
1
HDMI
4
1,3
1
4
1,3
4
1
1,3
6
4
1
1
3
1
DVI
I2C ADDRESS: A2H AND A3H
1
2
2
1
6
4
7
6
1
1,3
4
6
1
1,3
4
7
6
1
1,3
7
2,3
1
FSCLK+,FSCLK- should be routed
like a differential pair
9
5
5
5
5
8,9
8,9
2
1,5
5
5
AMUTE
5
5
7
Route (VIN1/ADC_IN1, ADC1_RETURN) and (VIN/ADC_IN2,
ADC2_RETURN) as differential tracks close to each
other and ground the return track of each pair very
close to the gm1601 D12 ball and ground pin
optional Filter Caps in between a pair on LBADC
differential tracks close to Malibu chip
GM1601
Place Series termination resistors on bidrectional
lines -DATA and DQS midway between gm1601 BGA and memory
Max trace length on this interface is 2.5 inches
Minimize trace length difference between DQS and dataand
among the data lines
Place Serial termination resistors on all address
and control lines very close to gm1601 BGA
Unload trace impedance on this interface is 90 Ohm
loaded trace impedance with DRAM load is 65 Ohm
(for 2.5 inch total trace length)
PANEL CONNECTOR