ZCU104 Board User Guide
34
UG1267 (v1.1) October 9, 2018
Chapter 3:
Board Component Descriptions
Quad SPI Flash Memory (MIO 0–5)
[
, callout 4]
The Micron MT25QU512ABB8ESF serial NOR flash Quad SPI flash memory can hold the boot
image for the MPSoC system. This interface is used to support QSPI32 boot mode as
defined in the
Zynq Ult MPSoC Technical Reference Manual
(UG1085)
The Quad SPI flash memory (U119) is located on the bottom of the board, and provides
512 Mb of non-volatile storage that can be used for configuration and data storage.
• Part number: MT25QU512ABB8ESF-0SIT (Micron)
• Supply voltage: 1.8V
• Datapath width: 4 bits
• Data rate: Various depending on single, dual, or quad mode
The connections between the SPI flash memory and the XCZU7EV MPSoC are listed in
MIO9
C26
Not Connected
NC
MIO35
C31
Not Connected
NC
MIO61
H34
MIO61_USB_DATA5_R
USB0
MIO8
D26
Not Connected
NC
MIO34
B34
Not Connected
NC
MIO60
H33
MIO60_USB_DATA4_R
USB0
MIO7
B25
Not Connected
NC
MIO33
B33
Not Connected
NC
MIO59
H32
MIO59_USB_DATA3_R
USB0
MIO6
A26
Not Connected
NC
MIO32
B31
Not Connected
NC
MIO58
H31
MIO58_USB_STP_R
USB0
MIO5
D25
MIO5_QSPI_LWR_CS_B
QSPI
MIO31
B30
Not Connected
NC
MIO57
H29
MIO57_USB_DATA1_R
USB0
MIO4 A25
MIO4_QSPI_LWR_DQ0 QSPI
MIO30
A33
MIO30_DP_AUX_IN
DPAUX
MIO56
G34
MIO56_USB_DATA0_R
USB0
MIO3
E25
MIO3_QSPI_LWR_DQ3
QSPI
MIO29
A32
MIO29_DP_OE
DPAUX
MIO55
G33
MIO55_USB_NXT
USB0
MIO2
B24
MIO2_QSPI_LWR_DQ2
QSPI
MIO28
A31
MIO28_DP_HPD
DPAUX
MIO54
G31
MIO54_USB_DATA2_R
USB0
MIO1
C24
MIO1_QSPI_LWR_DQ1
QSPI
MIO27
A30
MIO27_DP_AUX_OUT
DPAUX
MIO53
G30
MIO53_USB_DIR
USB0
MIO0
A24
MIO0_QSPI_LWR_CLK
QSPI
MIO26
A29
Not Connected
NC
MIO52
G29
MIO52_USB_CLK
USB0
Table 3-5:
MIO Connections
(Cont’d)
MIO
[25:0]
Bank 500
ZU7EV
U1
Pin
No.
Schematic Net Name
Type
MI
[51:26]
Bank
501
ZU7EV
U1
Pin
No.
Schematic Net Name
Type
MIO
[77:52]
Bank 502
ZU7EV
U1
Pin
No.
Schematic Net Name
Type
Table 3-6:
Quad SPI Flash Memory Component Connections to MPSoC U1
XCZU7EV (U1) Pin
Net Name
Quad SPI U119 (LWR), U120 (UPR)
Pin #
Pin Name
A25
MIO4_QSPI_LWR_DQ0 15
DQ0
C24
MIO1_QSPI_LWR_DQ1 8
DQ1
B24
MIO2_QSPI_LWR_DQ2 9
DQ2_WP_B
E25
MIO3_QSPI_LWR_DQ3 1
DQ3_RST_HOLD_B
A24
MIO0_QSPI_LWR_CLK 16
C
D25
MIO5_QSPI_LWR_CS_B 7
S_B