VC7203 GTX Transceiver Characterization Board
www.xilinx.com
UG957 (v1.3) October 17, 2014
DISCLAIMER
The information disclosed to you hereunder (the “Materials”) is provided solely for the selection and use of Xilinx products. To the maximum
extent permitted by applicable law: (1) Materials are made available "AS IS" and with all faults, Xilinx hereby DISCLAIMS ALL
WARRANTIES AND CONDITIONS, EXPRESS, IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF
MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; and (2) Xilinx shall not be liable (whether
in contract or tort, including negligence, or under any other theory of liability) for any loss or damage of any kind or nature related to, arising
under, or in connection with, the Materials (including your use of the Materials), including for any direct, indirect, special, incidental, or
consequential loss or damage (including loss of data, profits, goodwill, or any type of loss or damage suffered as a result of any action
brought by a third party) even if such damage or loss was reasonably foreseeable or Xilinx had been advised of the possibility of the same.
Xilinx assumes no obligation to correct any errors contained in the Materials or to notify you of updates to the Materials or to product
specifications. You may not reproduce, modify, distribute, or publicly display the Materials without prior written consent. Certain products are
subject to the terms and conditions of Xilinx’s limited warranty, please refer to Xilinx’s Terms of Sale which can be viewed at
www.xilinx.com/legal.htm#tos
; IP cores may be subject to warranty and support terms contained in a license issued to you by Xilinx. Xilinx
products are not designed or intended to be fail-safe or for use in any application requiring fail-safe performance; you assume sole risk and
liability for use of Xilinx products in such critical applications, please refer to Xilinx’s Terms of Sale which can be viewed at
www.xilinx.com/legal.htm#tos
.
© Copyright 2012–2014 Xilinx, Inc. Xilinx, the Xilinx logo, Artix, ISE, Kintex, Spartan, Virtex, Vivado, Zynq, and other designated brands
included herein are trademarks of Xilinx in the United States and other countries. All other trademarks are the property of their respective
owners.
Revision History
The following table shows the revision history for this document.
Date
Version
Revision
10/10/2012
1.0
Initial Xilinx release.
07/30/2013
1.1
Revised
Table 1-16
. Replaced the Master UCF listing with the Master XDC listing in
Appendix C, Master Constraints File Listing
. Updated links.
12/18/2013
1.2
Revised
Table 1-7
through
Table 1-12
and
Table 1-17
. Changed device number from
XC7V485T-3 FFG1761E to XC7VX485T-3 FFG1761E and XC7V485T to XC7VX485T. Pair
numbers changed in
FPGA Mezzanine Card HPC Interface, page 30
. Revised
Figure 1-10
. Changed title of
Appendix C
to
Master Constraints File Listing
. Updated
references in
Appendix D, Additional Resources
. Updated the Declaration of
Conformity link in
Appendix E, Regulatory and Compliance Information
.
10/17/2014
1.3
In
FPGA Compatibility, page 5
, “Unsupported interfaces are highlighted in this
document” was removed. The number of GTX transceiver power modules supplied
with the VC7203 board changed from four to three in
7 Series GTX Transceiver Power
Module, page 13
. The
VC7203 Board XDC Listing
changed. The module vendor
websites changed in
References, page 73
, Bellnix was removed, and General Electric
was added.