Xilinx Spartan-6 LX9, User Manual

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22 of 28 Rev D 24 Apr 2015
2.7.2 FPGA Decoupling
The decoupling requirements for the Spartan-6 device are specified in Xilinx UG393 Spartan-6 FPGA PCB
Design Guide . The S6LX9 MicroBoard follows the intent of these guidelines with a few variations:

A 0.22uF, 6.3V, 0201 package capacitor is used for the smallest capacitor bin rather than 0.47uF. The
S6LX9 MicroBoard layout was constrained to using the 0201 package, and 0.22uF was the largest
available capacitance rated at least 6.3V. To compensate, twice the UG393-suggested number of caps
are used.

A 4.7uF, 6.3V, 0402 package capacitor is used for the medium capacitor bin rather than the 0805
package. As stated in UG393, a smaller package is acceptable, and in fact provides better characteristics
than the 0805 package.

100uF, 6.3V, 1206 package capacitor is used for the bulk capacitor bin. Again, a smaller package is
used.
Please note that extensive testing during development has shown that 2.2uF 0402 caps can be utilized instead of
4.7uF 0402 caps in this application. To save on board space and costs this was extrapolated to a reduction in the
number of 4.7uF 0402 caps required for proper operation in this configuration.
Table 15 – S6LX9 MicroBoard Capacitors for XC6SLX9-CSG324
Value Body
Size
Type ESL
Max
ESR
Min
ESR
Max Voltage
Rating
Part Number
100uF 1206 2-Terminal
Ceramic X5R
5 nH 10m
Ω
60m
Ω
6.3V Murata GRM31CR60J107ME39L
4.7uF 0402 2-Terminal
Ceramic X5R
2 nH 10m
Ω
60m
Ω
6.3V Panasonic ECJ-0EB0J475M
0.22uF 0201 2-Terminal
Ceramic X5R
1.5 nH 10m
Ω
60m
Ω
6.3V Panasonic ECJ-ZEB0J224M
Table 16 – S6LX9 Board Capacitor Quantities for XC6SLX9-CSG324
VCCint VCCaux
VCCo
Bank 0
VCCo
Bank 1
VCCo
Bank 2
VCCo
Bank 3
100 uF 1 1 1 1 1 1
4.7 uF 2 1 2 2 2 2
0.22 uF 4 6 4 4 4 4