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PCI32 Interface v3.0

DS206 August 31, 2005

www.xilinx.com

11

Product Specification v3.0.151

Revision History

The following table shows the revision history for this document. 

 

Date

Version

Revision

07/30/02

1.2

Style updates

12/18/02

1.3

Updated to build v3.0.103; v5.Ii, 1st feature: 32-bit was 64/32-bit

3/7/03

1.4

Updated to build v3.0.105; v5.2i

4/14/03

1.5

Updated to build v3.0.106; in LogiCORE Facts table, updated PC32/33 product 
listings to include Spartan-3 device support.

5/8/03

1.6

Updated Xilinx tools to 5.2i SP2; added Note 10.

9/17/03

1.7

Updated to build v3.0.113; in LogiCORE Facts table, Xilinx Tools v6.1i SP1 was v5.2i 
SP2; date was May 8, 2003.

10/28/03

1.8

Updated to build v3.0.116, in Supported Devices table, added XC prefix to device 
names.

1/30/04

1.9

Updated to build v3.0.122, updated copyright information to 2004.

4/9/04

1.10

Updated to build v3.0.126; updated Xilinx tools to 6.2i SP1; in supported devices 
table, added notes 11 and 12; added suffix /I to all Virtex-II Pro devices.

4/26/04

1.11

Updated to build v3.0.128, updated Xilinx tools to 6.2i SP2, changed date to April 26, 
2004.

7/15/04

1.12

Updated to build v3.0.129 and to support Xilinx tools v6.2i SP3. The data sheet is 
updated to the new template.

11/11/04

1.13

Updated support for Xilinx tools v6.3i SP2; updated PCI spec to v3.0; added 
Exemplar LeonardoSpectrum and Cadence NC-Verilog entry and verification tools.

12/8/04

1.14

Updated to build 3.0.140 and Virtex-4 support.

3/7/05

1.15

Updated to Xilinx tools 7.1i and build v3.0.145.

5/13/2005

2.0

Updated build to 3.0.150, added support for Spartan-3E, addition of SP2.

8/31/05

3.0

Updated build to 3.0.151, updated SP 2 to SP

 4

 for 

ISE 

7.1i

Summary of Contents for PCI32

Page 1: ...dBus compliant Supported initiator functions Configuration read configuration write Memory read memory write MRM MRL Interrupt acknowledge special cycles I O read I O write Supported target functions...

Page 2: ...l devices 0oC Tj 85oC Table 1 Core Implementation Supported Device Power Supply PCI32 66 Virtex XCV200 FG256 6C 3 3V only Virtex E XCV200E FG256 6C 3 3V only Virtex E XCV400E FG676 6C 3 3V only Virtex...

Page 3: ...y applications that need a PCI interface General Description The Xilinx PCI interface is a pre implemented and fully tested module for Xilinx FPGAs The pinout for each device and the relative placemen...

Page 4: ...lity and flexibility in PCI designs The Smart IP technol ogy is incorporated in every PCI interface Xilinx Smart IP technology leverages the Xilinx architectural advantages such as look up tables and...

Page 5: ...bility including the ability to implement a capabilities pointer in configuration space allows the user to implement functions such as power management and message signaled interrupts in the user appl...

Page 6: ...es its performance from its ability to support burst transfers The performance of any PCI application depends largely on the size of the burst transfer Buffers to support PCI burst transfer can effici...

Page 7: ...locked into one DMA engine hence an optimized design that fits a specific application can be designed Recommended Design Experience The PCI Interface is pre implemented allowing engineering focus on...

Page 8: ...s Timing Parameters in the 33 MHz Implementations Table 3 PCI Bus Commands CBE 3 0 Command PCI Initiator PCI Target 0000 Interrupt Acknowledge Yes Yes 0001 Special Cycle Yes Ignore 0010 I O Read Yes Y...

Page 9: ...oat 40 Notes 1 Controlled by timespec constraints included in product 2 Controlled by SelectIO configured for PCI66_3 3 Controlled by guide file included in product Table 5 Timing Parameters 33 MHz Im...

Page 10: ...tor system v7 1i or higher The Xilinx CORE Generator is bundled with the ISE Foundation v7 1i software at no additional charge To purchase the Xilinx PCI core please contact your local Xilinx sales re...

Page 11: ...refix to device names 1 30 04 1 9 Updated to build v3 0 122 updated copyright information to 2004 4 9 04 1 10 Updated to build v3 0 126 updated Xilinx tools to 6 2i SP1 in supported devices table adde...

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