Xilinx MicroBlaze, Reference Manual

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128 www.xilinx.com MicroBlaze Processor Reference Guide
UG081 (v14.7)
Chapter 3: MicroBlaze Signal Interface Description
Lockstep Interface Description
The lockstep interface on MicroBlaze is designed to connect a master and one or more slave
MicroBlaze instances. The lockstep signals on MicroBlaze are listed in
Table 3-13 .
The comparison signals provided by
Lockstep_Out
are listed in Table 3-14 .
Table 3-13: MicroBlaze Lockstep Signals
Signal Name Description VHDL Type Direction
Lockstep_Master_Out
Output with signals going from
master to slave MicroBlaze. Not
connected on slaves. std_logic output
Lockstep_Slave_In
Input with signals coming from
master to slave MicroBlaze. Not
connected on master. std_logic input
Lockstep_Out
Output with all comparison
signals from both master and
slaves. std_logic output
Table 3-14: MicroBlaze Lockstep Comparison Signals
Signal Name Bus Index Range VHDL Type
MB_Halted
0 std_logic
MB_Error
1 std_logic
IFetch_POS
2 std_logic
I_AS_POS
3 std_logic
Instr_Addr
4 to 35 std_logic_vector
Data_Addr
36 to 67 std_logic_vector
Data_Write
68 to 99 std_logic_vector
D_AS
100 std_logic
Read_Strobe
101 std_logic
Write_Strobe
102 std_logic
Byte_Enable
103 to 106 std_logic_vector
IPLB_M_ABort
107 std_logic
IPLB_M_busLock
108 std_logic
IPLB_M_lockErr
109 std_logic
IPLB_M_rdBurst
110 std_logic
IPLB_M_request
111 std_logic
IPLB_M_RNW
112 std_logic
IPLB_M_wrBurst
113 std_logic
IPLB_M_MSize
114 to 115 std_logic_vector
IPLB_M_priority
116 to 117 std_logic_vector
IPLB_M_ABus
118 to 149 std_logic_vector
IPLB_M_UABus
150 to 181 std_logic_vector
IPLB_M_BE
1
182 to 197 std_logic_vector
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