3.6.5.1 LFXO Design guidelines
1. LFXO shall be placed away from high frequency components and traces.
2. The ground connection for the load capacitor shall be short using ground vias.
3. The crystal shall be placed close to the module.
4. PCB traces between module and the crystal shall be kept short.
5. Load capacitors shall be low leakage and temperature stable (NPO or COG) type.
6. The differential traces shall be kept to the same length.
7. Ground area shall be placed under crystal and connected to the main ground plane.
8. Open traces to the pins shall be avoided to reduce parasitic capacitance and coupling
effects.
9. Ground area shall be used between the crystal traces and other PCB traces for better
decoupling.
3.6.6 Programming interface
The evaluation board provides a place holder for 2×10 pin connector. It can be used to con-
nect directly to a JTAG flash adapter used for development. Please take care of the correct
mounting of the flash adapter. The recommended flash adapter is one of the "Segger J-Link"
family.
3.6.7 Radio Protocol Selection (Setebos-I only)
For Setebos-I only, the pin B1/RPS on the connector P2 shall be used to select the radio
protocol used by the module.
• A low level during and shortly after reset starts the module with Bluetooth Low Energy
5.1 firmware: the module works as a Proteus-III.
• A high level during and shortly after reset starts the module with Proprietary firmware:
the module works as a Thyone-I.
By default, B1/RPS pin is pulled down and the module works therefore as a Proteus-III.
Mini evaluation board user manual version 1.3
© June 2021
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