9
1.0/November 1998
1891 1210
Section 3
Technical description
Refer to the circuit diagram WD1632 at the rear of this manual.
3.1 POWER SUPPLY
DC power is connected to the transmitter module via PL3. The positive side of the supply
is fed to TR2 which acts as a series switch; when PL1 pin 2 is connected to 0V to enable
the transmitter then base current flows to TR2 via D6 and R54 and turns TR2 on. The
output from the collector of TR2 (‘+Vraw’) is fed to dual operational amplifier IC4, to TR3
collector (via chokes L5 and L6) and also to voltage regulator IC2. This regulator provides
a stable output of nom5V which is used to power all the remaining sections of the
transmitter (apart from IC7) either directly or via R-C decoupling networks.
3.2 INPUT INTERFACE
When the transmitter is to be used with an analogue modulation input then this input is fed
from PL1 pin 4 via R2 and C2 to RV1 in the feedback network around IC1a. RV1 acts as
an analogue gain control.
When the transmitter is to be used with a digital modulation input then this input is fed
from PL1 pin 3 via R1 to RV1 in the feedback network around IC1a. RV1 is set mid-way in
this application such that it has no effect; IC1a then functions as a comparator and
produces an output which swings between approxi0.7V and +4.3V depending on
whether the digital input is low or high. These output levels are well-defined and result in
the modulation level being independent of the logic levels at the input to the transmitter.
3.3 MODULATION STAGE
The output from IC1a is fed to a low-pass filter built around IC1b. This restricts the
modulation bandwidth such that adjacent channel power levels are kept within
specification.
The output from IC1b is fed via R24 and RV2 to RV3 and R28. (C16 adds a further low-
pass filter stage at R24.) The modulation signal at the junction of RV2 and RV3 is fed to
the modulation input of the TCXO U1. The wiper of RV3 is connected via R31 to the
varicap diode D2 in the UHF oscillator.
Summary of Contents for ST500
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