WinSystems SBC35-427 Supplemental Bios Manual Download Page 1 | Manualshive

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WinSystems, Inc. | 715 Stadium Drive, Arlington, Texas 76011 | 817-274-7553 | info@winsystems.com | www.winsystems.com

SBC35-427

Supplemental BIOS Manual

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Summary of Contents for SBC35-427

Page 1: ...WinSystems Inc 715 Stadium Drive Arlington Texas 76011 817 274 7553 info winsystems com www winsystems com SBC35 427 Supplemental BIOS Manual...

Page 2: ...statutory implied or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement WINSYSTEMS Inc makes no warranty of merchantab...

Page 3: ...Configuration 11 4 3 3 Network 12 4 3 4 Video 12 4 3 5 SATA 13 4 3 6 USB 14 4 3 7 Power Control 14 4 3 8 Thermal 15 4 3 9 TPM 16 4 3 10 Serial Ports 17 4 3 11 Embedded Controller 18 4 3 12 HD Audio 18...

Page 4: ...tware Description 27 6 1 Software Design Specification UEFI Operating System Support 27 6 2 Software Design Specification Legacy Operating System Support 27 6 3 Software Design Specification Boot Devi...

Page 5: ...management of mobile desktop and server platforms Dynamic Video Memory Technology DVMT Allows dynamic alloca tion of system memory for use as video memory to ensure the most efficient use of availabl...

Page 6: ...cursor keys to select UEFI Built In EFI Shell from the list of boot devices displayed under the Boot Override section 5 Press Enter The SBC35 427 executes the built in UEFI shell and displays a list o...

Page 7: ...y 3 In the BIOS setup utility use the cursor keys to highlight the Save Exit menu option 4 4 Use the cursor keys to select UEFI Built In EFI Shell from the list of boot devices displayed under the Boo...

Page 8: ...during POST If you are running a Windows 10 operating system and you cannot enter the BIOS during POST by pressing either DEL or ESC then follow the instructions below 1 Press the Windows key on your...

Page 9: ...ves as the top level BIOS page for configuring peripherals and devices present on the SBC35 427 platform The configuration subpages include pages for the CPU network interfaces serial ports USB ports...

Page 10: ...e the virtualization overheads occurring in cache I O and memory Enable Disable Enable Bi directional PROCHOT When a processor thermal sensor trips any core the PROCHOT is driven and the processor is...

Page 11: ...Enables disables the use of enhanced C States C1 state is when the CPU is idle but can instantly revert to its working state C1E C1 Enhanced is the updated modern version of same state Enable Disable...

Page 12: ...ntroller Enables disables the Integrated Sensor Hub ISH controller The ISH enables the ability to offload sensor polling and algorithm processing to a dedicated low power co processor Enable Disable E...

Page 13: ...p Custom Profile Settings Configure the parameters according to the specific LVDS panel specification NOTE LVDS Bridge must be enabled as well as IGD Flat Panel set to Custom Profile to view this opti...

Page 14: ...iver Support Enables disables USB mass storage driver support The USB mass storage specification provides an interface to a number of industry standard command sets allowing a device to disclose its s...

Page 15: ...ses the DPTF driver to disable the trip point 0 to 127 90 Passive Thermal Trip Point Controls the temperature of the ACPI Passive Thermal Trip Point A value of 0 causes the DPTF driver to disable the...

Page 16: ...rity Priority Critical Policy Enables disables the Critical Policy In the event the platform reaches a critical temperature the Critical Policy is responsible for gracefully shutting down the system E...

Page 17: ...mode None 120 ohms None COM2 Controls and configures SOC Serial Port 2 This port supports RS232 RS485 and RS422 protocols If using the CBL SER2 202 12A cable assembly this port corresponds to the J3...

Page 18: ...the Legacy UART on the EC This port only supports the RS 232 protocol NOTE Legacy UART settings are mirrored in the Serial Ports section of the BIOS options Enable Disable Enable Address Selects Legac...

Page 19: ...of the PHY controller L1 mode is bidirectional and results in greater power reductions though with a greater exit latency Disable L0s L1 L0sL1 Auto Auto PCIe Speed Selects the PCIe port speed Auto ma...

Page 20: ...ble SDIO Enables disables the SDIO interface Enable Disable Disable Feature Description Choices Default Feature Description Choices Default USB Port 5 Enables disables the USB port When disabled any d...

Page 21: ...s disables DCI Auto Detect When set to Auto Detect it detects DCI being connected during BIOS post time and enables DCI Otherwise it disables DCI Enable Disable Enable Feature Description Choices Defa...

Page 22: ...d If only the user password is set then this password is required during boot or entering the BIOS setup with administrative privileges NOTE If both the administrator and user passwords are set then e...

Page 23: ...ed Enable Disable Enable Secure Boot Mode Custom and Standard Sets UEFI Secure Boot Mode to Standard mode or Custom mode this change is in effect after save After reset the mode returns to Standard mo...

Page 24: ...e Disable New Boot Option Policy Controls the placement in the boot order of newly detected UEFI boot options If default is selected a new device is moved to the bottom of the boot priority list but i...

Page 25: ...R partitioning scheme UEFI looks for bootable drives that use a GPT partitioning scheme NOTE This option is only available when CSM Support is enabled UEFI and Legacy Legacy only UEFI only UEFI and Le...

Page 26: ...ntally been turned off in the BIOS Feature Description Save Changes and Exit Saves all custom configured BIOS settings then immediately boots to the first boot device set in Boot Option Properties see...

Page 27: ...escribes the AMI BIOS components to be used in the implementation of the SBC35 427 BIOS firmware 6 1 Software Design Specification UEFI Operating System Support The BIOS supports booting the following...

Page 28: ...e current boot priority Cryptographic support Provides cryptographic related libraries PPI and UEFI protocols for security modules secure FW update secure boot etc Source level support Provides source...

Page 29: ...oot fails the last code displayed provides an indicator of the failing code Regular Boot POST Codes Code PEI_CORE_STARTED 0x10 PEI_CAR_CPU_INIT 0x11 PEI_CAR_NB_INIT 0x15 PEI_CAR_SB_INIT 0x19 PEI_MEMOR...

Page 30: ..._USB_RESET 0x9B DXE_USB_DETECT 0x9C DXE_USB_ENABLE 0x9D DXE_IDE_BEGIN 0xA0 DXE_IDE_RESET 0xA1 DXE_IDE_DETECT 0xA2 DXE_IDE_ENABLE 0xA3 DXE_SCSI_BEGIN 0xA4 DXE_SCSI_RESET 0xA5 DXE_SCSI_DETECT 0xA6 DXE_S...

Page 31: ...odes Code PEI_MEMORY_INVALID_TYPE 0x50 PEI_MEMORY_INVALID_SPEED 0x50 PEI_MEMORY_SPD_FAIL 0x51 PEI_MEMORY_INVALID_SIZE 0x52 PEI_MEMORY_MISMATCH 0x52 PEI_MEMORY_NOT_DETECTED 0x53 PEI_MEMORY_NONE_USEFUL...

Page 32: ...OAD_ERROR 0xD9 DXE_BOOT_OPTION_FAILED 0xDA DXE_FLASH_UPDATE_FAILED 0xDB DXE_RESET_NOT_AVAILABLE 0xDC S3 Resume Error Codes Code PEI_MEMORY_S3_RESUME_FAILED 0xE8 PEI_S3_RESUME_PPI_NOT_FOUND 0xE9 PEI_S3...

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