WinSystems PCM-AIO, Operation Manual, Page: 12 / 43

lect/con vert to each chan nel. A chan nel is pro grammed for dif fer en tial op era tion by writ -
ing a '1' to the DI bit in the chan nel/con vert word. For proper op era tion a chan nel that is
used as a dif fer en tial with dif fer en tial in puts should have a bias re turn for each in put, i.e.
(+) and (-). A one me gohm re sis tor from each dif fer en tial in put to ground will pro vide a
suf fi cient bias re turn path for each in put.
Note: It is pos si ble to re verse the + and - dif fer en tial in puts in soft ware for a given
chan nel. See Ta ble 1 of the MAX180 da tasheet on page 7-94 in Ap pen dix C.
2.9
Unipolar/Bipolar Operation
Each chan nel on the PCM- AIO can be op er ated in ei ther uni po lar or bi po lar mode. A
uni po lar in put pro vides a 0 to 5 VDC in put while a bi po lar in put pro vides a -2.5 VDC to
+2.5VDC in put. A chan nel is pro grammed for uni po lar if the BP bit in the chan nel se
-
lect/con vert bit is set to '0' and by pro gram ming the BP bit to a '1', the chan nel is set for bi po -
lar op era tion.
2.10
A/D Software Interface
An A/D con ver sion is started by writ ing a byte to the chan nel se lect/con vert byte lo cated
at I/O port lo ca tion BASE + 0. The ac tual lo ca tion of the PCM- AIO de pends on the I/O ad -
dress that is se lected by jumper block J8. The byte writ ten to the chan nel se lect/con vert
port will set the PCM- AIO for the se lected chan nel, uni po lar/bi po lar, and sin gle ended/dif -
fer en tial op era tion and then be gin a con ver sion. It is im por tant to note that in this mode of
op era tion, the MAX180 al lows only 1.875 uS to ac quire the sig nal. If the in put source im -
ped ance is greater than 8 kOhms, then the Asyn chro nous Hold mode will need to be used in
or der to al low enough time to ac quire the sig nal. The PCM- AIO will con vert the ana log
volt age to digi tal data in ap proxi mately 10 uS. If de sired, an end of con ver sion in ter rupt
can be gen er ated on the PC/104 and routed through J7 as shown ear lier. The in ter rupt con -
trol ler will need to be ini tial ized to take ad van tage of this fea ture. An other way to de ter -
mine if the con ver sion is com pleted is to poll the ST status bit in the STATUS READ I/O
port lo cated at BASE + 4. The ST status bit is the most sig nifi cant bit (MSB). The ST bit
will be high '1' when the A/D con ver tor is BUSY and low '0' when it is fin ished. See the
MAX180 da tasheet, page 7-95, Fig ure 7b in the Ap pen dix C for tim ing.
If the in put source im ped ance is greater than 8 kOhms, the Track and Hold cir cuit will
not have enough time to ac quire the sig nal and the con ver sion will not be cor rect. Un der
these con di tions, the MAX180 A/D con ver tor will need to op er ated in the “Asyn chro nous
Hold Mode”. See the MAX180 da tasheet, page 7-98, Fig ure 10b in the Ap pen dix C. The
jumper J2 will need to be re moved to place the MAX180 in the asyn chro nous mode. In the
asyn chro nous mode it will be nec es sary to per form two write cy cles to be gin a con ver sion.
The first write cy cle is the same as bef ore, ex cept the chan nel data is writ ten to an odd I/O
port of BASE+1. This will se lect the proper chan nel and se lect the mode of op era tion, how -
ever a con ver sion will not be gin un til the sec ond write cy cle is gen er ated by writ ing the
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