
2.5
Interrupt Routing Select
The PCM- AIO is ca pa ble of gen er at ing an in ter rupt on con ver sion com plete from the
MAX180. This in ter rupt may be routed to any of sev eral PC/104 bus in ter rupts us ing the
jumper block at J7 or J10. The jump er ing de tail for J7 and J10 is shown here :
2.6
A/D Input Connector
The fig ure be low shows the pin out for the PCM- AIO ana log in put con nec tor J1 in both
single- ended and dif fer en tial modes.
2.7
Single Ended Operation
The PCM- AIO al lows eight sin gle ended in puts with a volt age in put range of 0 to 5 VDC
for uni po lar op era tion or -2.5 to +2.5 VDC for bi po lar op era tion. An in put chan nel is se -
lected as a sin gle ended in put by set ting the SI bit to a '0' when writ ing the chan nel se -
lect/com mand word.
2.8
Differential Operation
The PCM- AIO al lows up to 4 chan nels of dif fer en tial op era tion. Each dif fer en tial chan -
nel re quires two in puts, i.e. a (+) in put and a (-) in put. The PCM- AIO can have a mix ture of
sin gle ended and dif fer en tial in put sig nals by pro gram ming the ap pro pri ate chan nel se -
980723
OPERATIONS MANUAL PCM-AIO
Page 2-3
WinSystems - "The Embedded Systems Authority"
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J1
J1
Channel 0
Channel 2
Ground
Channel 4
Ground
Channel 6
Ground
Channel 1
Ground
Channel 3
Ground
Channel 5
Channel 7
Channel 1
Channel 3
Ground
Channel 5
Ground
Channel 7
Ground
N/C
Ground
N/C
Ground
N/C
N/C
Channel 0 (+)
Channel 2 (+)
Ground
Channel 4 (+)
Ground
Channel 6 (+)
Ground
Channel 0 (-)
Ground
Channel 2 (-)
Ground
Channel 4 (-)
Channel 6 (-)
Channel 0 (-)
Channel 2 (-)
Ground
Channel 4 (-)
Ground
Channel 6 (-)
Ground
N/C
Ground
N/C
Ground
N/C
N/C
J1 Input Pin Definitions - Single Ended Mode
J1 Input Pin Definitions - Differential Mode
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9 o o 10
IRQ14
IRQ15
IRQ12
IRQ11
IRQ10
J10
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3 o o 4
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7 o o 8
9 o o 10
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IRQ2
IRQ7
IRQ6
IRQ5
IIRQ4
IRQ3
J7
Summary of Contents for PCM-AIO
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