WinSystems EBC-C384-D, Manual

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140703
PCB Connector: TEKA SVC225C405M123-0 (J9, J12)
Mating Connector: ITW-PANCON 050-050-455A (Housing)
DIGITAL I/O
J9, J12 - Digital I/O
Visual
Index
The EBC-C384 has 48 open collector digital I/O bits with a default base address of 120H. Each bit is configured as
an open collector with a 10K pullup. Each bit is able to sink up to 8mA. The first 24 lines are capable of fully latched
event sensing with polarity being software programmable.
Digital I/O Connectors
These 48 lines of digital I/O are terminated through two 50-pin connectors at J9 and J12 . The J9 connector handles
I/O ports 0 through 2 while
J12
handles ports 3 through 5.
The I/O connectors can p5V to an I/O rack for miscellaneous purposes by jumpering
JP5
and
JP8
. When
JP5
is jumpered (1-2), +5V is provided at pin 49 of J9. When JP8 is jumpered (1-2), then +5V is provided at pin 49 of J12 .
It is the user’s responsibility to limit current to a safe value (less than 400 mA) to avoid damaging the CPU board.
JP5/JP8 - Digital I/O Power
Visual
Index
J9
(Ports 0/1/2)
Port 2 Bit 7 Port 2 Bit 6 Port 2 Bit 5
Port 2 Bit 4 Port 2 Bit 3 Port 2 Bit 2 Port 2 Bit 1 Port 2 Bit 0 Port 1 Bit 7 Port 1 Bit 6 Port 1 Bit 5 Port 1 Bit 4 Port 1 Bit 3 Port 1 Bit 2 Port 1 Bit 1 Port 1 Bit 0 Port 0 Bit 7 Port 0 Bit 6 Port 0 Bit 5 Port 0 Bit 4 Port 0 Bit 3 Port 0 Bit 2 Port 0 Bit 1 Port 0 Bit 0
+3.3V/5V
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
□ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □
□ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49
J12
(Ports 3/4/5)
Port 5 Bit 7 Port 5 Bit 6 Port 5 Bit 5 Port 5 Bit 4 Port 5 Bit 3 Port 5 Bit 2 Port 5 Bit 1 Port 5 Bit 0 Port 4 Bit 7 Port 4 Bit 6 Port 4 Bit 5 Port 4 Bit 4 Port 4 Bit 3 Port 4 Bit 2 Port 4 Bit 1 Port 4 Bit 0 Port 3 Bit 7 Port 3 Bit 6 Port 3 Bit 5 Port 3 Bit 4 Port 3 Bit 3 Port 3 Bit 2 Port 3 Bit 1 Port 3 Bit 0
+3.3V/5V
GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND GND
2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 32 34 36 38 40 42 44 46 48 50
□ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □
□ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □ □
1 3 5 7 9 11 13 15 17 19 21 23 25 27 29 31 33 35 37 39 41 43 45 47 49
JP5 - Digital I/O VCC for J9
□
□
JP5
1
2
+5V is provided at pin 49 of J9 1-2
No Power at Pin 49 of J9 (default) OPEN
JP8 - Digital I/O VCC for J12
□
□
JP8
1
2
+5V is provided at pin 49 of J12 1-2
No Power at Pin 49 of J12 (default) OPEN