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Configre SDRAM Timing by SPD
This option provides DIMM plug-and-play support by Serial Presence
Detect (SPD) mechanism via the System Management Bus (SMBus)
interface. You can disable this option to manage the following four SDRAM
timing options by yourself. In addition, SDRAM operating timings may
follow serial presence from EEPROM content by setting this option to
“Enabled”, and all of SDRAM timing options will be not available and
hidden.
DRAM Frequency
PC-100 means the memory bus is running at 100MHz. PC-133 means its bus
is running at 133MHz.
SDRAM CAS# Latency
This option controls the number of SCLKs between the time a read
command is sampled by the SDRAMs and the time the North Bridge, 8601A,
samples correspondent data from the SDRAMs.
Spread Spectrum
This option is for EMI test only.
Memory Hole
This option allows the end user to specify the location of a memory hole for
memory space requirement from ISA-bus cards.
USB Controller
This option will enable on-chip USB function to support USB peripheral
Summary of Contents for WPC-651
Page 3: ...III To Be Added...
Page 11: ...1 5 1 4 1 Product Outlook The front view of WPC 651 P400 The front view of WPC 651 P1000...
Page 12: ...1 6 The rear view of WPC 651 P400 The rear view of WPC 651 P400...
Page 13: ...1 7...
Page 50: ...V RS485 1 2 7 9 8 10 19 20...
Page 65: ...XX CAUTION z Do not install and press battery shown as below direction...
Page 66: ...XXI...