BIOS Setup Information
WEB-6681 SERIES
【
R1.0
】
User’s Manual
4-13
4.8 Advanced Chipset Setup Menu
NOTE
:
This setup is very important to keep system stability. If you are not
technical person, do not attempt to change any parameters. The best way is
to choose optimal default setting.
Configure SDRAM Timing by SPD
This option provides DIMM plug-and-play support by Serial Presence Detect
(SPD) mechanism via the System Management Bus (SMBus) interface. You can
disable this option to manage the following four SDRAM timing options by
yourself. In addition, SDRAM operating timings may follow serial presence from
EEPROM content by setting this option to “Enabled”, and all of SDRAM timing
options will be not available and hidden.
DRAM Frequency
PC-100 means the memory bus is running at 100MHz. PC-133 means its bus is
running at 133MHz.
SDRAM CAS# Latency
This option controls the number of SCLKs between the time a read command
is sampled by the SDRAMs and the time the North Bridge, 8601A, samples
correspondent data from the SDRAMs.
Spread Spectrum