Preliminary W77E516
- 30 -
RCAP2H: This register is used to capture the TH2 value when a timer 2 is configured in capture
mode. RCAP2H is also used as the MSB of a 16-bit reload value when timer 2 is
configured in auto-reload mode.
Timer 2 LSB
Bit:
7
6
5
4
3
2
1
0
TL2.7 TL2.6 TL2.5 TL2.4 TL2.3 TL2.2 TL2.1 TL2.0
Mnemonic: TL2 Address: CCh
TL2: Timer 2 LSB
Timer 2 MSB
Bit:
7
6
5
4
3
2
1
0
TH2.7 TH2.6 TH2.5 TH2.4 TH2.3 TH2.2 TH2.1 TH2.0
Mnemonic: TH2 Address: CDh
TH2: Timer 2 MSB
NVM Control
Bit:
7
6
5
4
3
2
1
0
ENVM EWR ETM3 ETM2 ETM1 ETM0
-
BUSY
Mnemonic: NVMCON Address: CEh
ENVM: Enable 64 bytes NVM data cells while user would like to write or read NVM. If user would
not like to access NVM bytes. Clear ENVM bit to reduce power consumption.
EWR: Set this bit to write NVM bytes.
ETM3, ETM2, ETM1, ETM0: Adjust EEPROM timing for different MXT frequency. The default value
of ETMx bits are H.
MXT freq. (Hz)
ETM3
ETM2
ETM1
EMT0
0M
−
2.5M
0
0
0
0
2.6M
−
5M
0
0S
0
1
5.1M
−
7.5M
0
0
1
0
7.6M
−
10M
0
0
1
1
10.1M
−
12.5M
0
1
0
0
12.6M
−
15M
0
1
0
1
15.1M
−
17.5M
0
1
1
0
17.6M
−
20M
0
1
1
1
20.1M
−
22.5M
1
0
0
0