Western Digital Purple PR1000M, Technical Reference Manual

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P
RODUCT
F
EATURES PR1000M
22 RELEASED 5/8/17 (WD CONFIDENTIAL) 2679-800020-A03
Random mode is the default operational mode for CacheFlow. Once CacheFlow
detects a sequential access pattern, it leaves random mode. CacheFlow also
performs predictive read operations to increase the probability that data requested in
future commands already exists in the cache.
CacheFlow partitions the buffer into multiple segments to allow for the fact that
applications may access multiple non-contiguous areas on the disk. CacheFlow tracks
the amount of valid data in each segment and controls the deallocation of segments
to maximize drive performance.
3.21.1 Write Cache
CacheFlow is designed to improve both single and multi-sector write performance by
reducing delays caused by seek time and rotational latency.
The write cache adaptively detects random and sequential access patterns during
application execution.
If a defective sector is found during a write cache operation, that sector is
automatically relocated before the write occurs.
3.21.2 Read Cache
CacheFlow implements a multiple segment read cache. Cache segments are assigned
to read commands as they are received from the host.
Each read segment consists of pre and post read sectors in addition to the host-
requested sectors. This maximizes the amount of cache data in the drive’s buffer,
thereby increasing the likelihood of cache hits and improving overall performance.
3.22 48-bit Logical Block Addressing (LBA)
The 48-bit Address feature set allows devices with capacities up to approximately 281
tera sectors or approximately 144 peta bytes. In addition, the number of sectors that
may be transferred by a single command are increased by increasing the allowable
sector count to 16 bits.
3.23 Power Management
This drive supports the ATA power management commands that lower the average
power consumption of the hard drives. For example, to take advantage of the lower
power consumption modes of the drive, an energy efficient host system could
implement a power management scheme that issues a Standby Immediate command
when a host resident disk inactivity timer expires. The Standby Immediate command
causes the drive to spin down and enter a low-power mode. Subsequent disk access
commands would cause the drive to spin up and execute the new command. To
48-bit Address
Bits (47:40) Bits (39:32) Bits (31:24) Bits (23:16) Bits (15:8) Bits (7:0)
LBA H
IGH
(
EXP
)
LBA M
ID
(
EXP
)
LBA L
OW
(
EXP
)
LBA H
IGH
LBA M
ID
LBA L
OW
16-bit Sector Count
Bits (15:8) Bits (7:0)
S
ECTOR
C
OUNT
(
EXP
)
S
ECTOR
C
OUNT