VVDN_T4MFCS_Scaleout_User_Manual Rev. A0-03
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CONFIDENTIAL
CPU0: T4240E, Version: 2.0, (0x82480020)
Core: e6500, Version: 2.0, (0x80400120)
Clock Configuration:
CPU0:1666.667 MHz, CPU1:1666.667 MHz, CPU2:1666.667 MHz,
CPU3:1666.667 M
CPU4:1666.667 MHz, CPU5:1666.667 MHz, CPU6:1666.667 MHz,
CPU7:1666.667 M
CPU8:1666.667 MHz, CPU9:1666.667 MHz, CPU10:1666.667 MHz,
CPU11:1666.667
CCB:733.333 MHz,
DDR:933.333 MHz (1866.667 MT/s data rate) (Asynchronous),
IFC:183.333 MHz
FMAN1: 733.333 MHz
FMAN2: 733.333 MHz
QMAN: 366.667 MHz
PME: 533.333 MHz
L1: D-cache 32 KiB enabled
I-cache 32 KiB enabled
Reset Configuration Word (RCW):
00000000: 16070019 18101916 00000000 00000000
00000010: 70702828 40555200 0c020000 f5000000
00000020: 00000000 ee0000ee 00000000 000287fe
00000030: 00000440 10000009 00000000 00000028
Board: T4240MFCS, SERDES Reference Clocks:
SERDES1=100MHz SERDES2=156.25MHz
SERDES3=(PLL1=125MHz,PLL2=156.2MHz)
SERDES4=(PLL1=125,PLL2=100MHz)
I2C: ready
SPI: ready
DRAM: Detected UDIMM D3-66JK118SV-13
Detected UDIMM D3-66JK118SV-13