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CONFIDENTIAL – DO NOT COPY
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File No. SG-0214
Display timing programming
Display timing signals provide timing information so the Display Port can be connected to an
external display device via a TTL or LVDS interface. Based on values programmed in
registers, the Display Timing Generator produces the horizontal sync (DHS), vertical sync
(DVS), and data enable (DEN) control signals. The figure below provides the registers that
define the output display timing.
Horizontal values are in single-pixel increments except for the display horizontal sync end
position which is in 4-DCLK increments. When the display is in double-wide mode, horizontal
settings should use even numbers. Vertical values are programmed in line increments relative
to the leading edge of the vertical sync signal.
Figure 8-13 Display Windows and Timing
Summary of Contents for VM60P HDTV10A
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