VIPA SLIO FM 050-1BB30, Manual, Page: 35 / 40

Manual VIPA System SLIO
Chapter 3 Deployment
HB300E - FM - RE_050-1BB30 - Rev. 10/30 3-3
Bit Name Function
0 ... 1 - reserved
2 SW_GATE_SET sets the software gate
3 ... 5 - reserved
6 RES_SET resets the bits STS_OFLW, STS_UFLW and
STS_ZP with
edge 0-1
7 ... 9 - reserved
10 SW_GATE_RESET resets the software gate
11 ... 15 - reserved
DS = Data set for access via CPU, Profibus and ProfiNET
IX = Index for access via CANopen
SX = Subindex for access via EtherCAT
Name Bytes Function Default DS IX SX
CH0A 1 C0: Input frequency track A 02h 01h 3100h 01h
CH1B 1 C0: Input frequency track B 02h 01h 3101h 02h
CH2A 1 C1: Input frequency track A 02h 01h 3102h 03h
CH3B 1 C1: Input frequency track B 02h 01h 3103h 04h
MODE2_I 1 C0: Counter mode 2* 00h 80h 3104h 05h
MODE3_I 1 C0: Counter mode 3* 00h 80h 3105h 06h
MODE2_II 1 C1: Counter mode 2* 00h 82h 3106h 07h
MODE3_II 1 C1: Counter mode 3* 00h 82h 3107h 08h
* This parameter may only be transferred at STOP state.
The counter is controlled via the internal gate (I gate). The I gate
corresponds to the software gate (SW gate).
SW gate: Open (activate):
in user program by edge 0-1
SW_GATE_SET in the
control word
Close (deactivate): in user program by edge 0-1
SW_GATE_RESET in the
control word
CCTRL_I
CCTRL_II
Control word
Parameter data
Control counter