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NOTE:
The Intel Management Engine in the chipset requires memory to be
populated in Channel A, DIMM 0 in order for it to enable Intel Quiet System
Technology and Intel Active Management Technology.
Figure 8 shows a dual channel configuration using three DIMMs. In this
example, the combined capacity of the two DIMMs in Channel A equal the
capacity of the single DIMM in the DIMM0 (blue) socket of Channel B.
Figure 8 -
Dual Channel (Interleaved) Mode Configuration with Three DIMMs
Figure 9 - shows a dual channel configuration using four DIMMs. In this
example, the combined capacity of the two DIMMs in Channel A equal the
combined capacity of the two DIMMs in Channel B. Also, the DIMMs are
matched between DIMM0 and DIMM1 of both channels.
Figure 9 -
Dual Channel (Interleaved) Mode Configuration with Four DIMMs
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