ViewSonic VS13518-1W, Service Manual

Page: 41 / 99

4.1.4 Feedback and OVP Protect Circuit
Pin R of IC803 is supplied 2.5V stable voltage. It is connected to 5V and 19V output
through R830,R831 and R823. and R824 are output sampling resistor. When the sampling
voltage morethan 2.5V or less than 2.5V, feedback current of IC802 will change, this can
change the voltage fromtransformer T801.Q804, R822, and ZD801 make up of dummy
loading circuit. For start-up sequence, during 5Voutput take place high loading first, this
dummy loading circuit operated to insure 19V not be increased.
4. 2 LED Circuit
4.2.1 Low voltage to high voltage circuit
19VDC provides the power for IC501; the control signals Brightness and ON/OFF come
from I/F board.ON/OFF signal connect to pin10 of IC501 and makes IC501 enable.
Brightness signal connect to pin1 of IC501and regulates the panel brightness, The
operation frequency is determined by the external Resistor R522 and capacitorR505
connected to pin13 of IC501. BURST MODE regulated dimming
frequency is determined by the external resistor R505 connected to pin13 of IC501. C508
is used for soft start and compensation, C506, R508 are used for dump noise.
The output drives, (pins16 respectively) output square pulses to drive MOSFET U501,
U501 is N channel MOSFET. U501 work as Boost topology, it is high efficient, PWM
switching.
During start up, OVP (pin11) senses the voltage at the output voltage. When OVP
reaches 1V, the output voltage is regulated.
The current flowing through LED is sensed and regulated through sense resistor
R515,R516,R517,R518,R519,R520. The feedback voltage connected to Pin2~Pin5 and
Pin7~Pin10 (ISEN).
4.3 I/F Board Circuit
4.3.1 Power Input
+5V is from the power board and supply for the panel and for the LDO. +3.3V is form the
LDO output used for U105 (Scaler IC: NT68668UFG), and then 3.3V output is generated
from +5V through C101, C104 and C102 filtering, and U101 outputs. +3.3V is only used for
U105.
4.3.2 MCU & Scaler(
TSUM1PLR-LF )
The frequency of XTAL1 is 12.000MHz. U105 # 65 is defined as panel_enable. When the
I/O port is high, Q101 and Q104 are conducted. And then after C108 and C109 filtering,
obtain the voltage of VLCD, which will be connected to CN105. U105 # 29 is defined as
VGA_ DET connected with CN102 #5. U105 # 1 is a pin of hardwire reset. U105 # 79-#
Confidential - Do Not Copy
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X2450W/WM
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LED-1
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