BIOS
Page 4-10
Precharge to Active (Trp)
This item refers to the number of cycles required to return data to its original
location to close the bank or the number of cycles required to page memory before
the next bank activate command can be issued. The default is by DRAM SPD.
Options: 3T, 2T, 4T, 5T.
Tras Non-DDR400/DDR400
This item sets Tras Non-DDR400/DDR400 timing. The default is by DRAM SPD.
Options: 6T/8T, 7T/10T, 5T/6T, 8T/12T.
Active to CMD (Trcd)
This item sets the timing parameters for the system memory such as the CAS (Column
Address Strobe) and RAS (Row Address Strobe). The default is by DRAM SPD.
Options: 3T, 2T, 4T, 5T.
DRAM Burst Length
This item sets the DRAM Burst Length.
Options: 4, 8.
DRAM Command Rate
Setup the timing at each cycle.
Options: 1T Command, 2T Command.
Write Recovery Time
This item sets the DRAM Write Recovery Time.
Options: 2T , 3T.
tWTR for DDR400 ONLY
TWTR Timing Control for DDR400 only.
Options: 1T , 3T, 2T.
Summary of Contents for KM400
Page 10: ...Introduction Page 1 6 Figure 5 System Block Diagram System Block Diagram...
Page 14: ...A JKHAI Page 2 4 Page Left Blank...
Page 15: ...Installation Page 3 1 Section 3 INSTALLATION...
Page 16: ...Installation Page 3 2 Mainboard Layout Figure 1...
Page 68: ...Drivers Installation Page 5 8 Page Left Blank...
Page 76: ...Appendix C 2 Page Left Blank...