VIA Technologies EPIA-NX, User Manual

Page: 65 / 78

BIOS Setup
53
F
REQUENCY
/ V
OLTAGE
C
ONTROL
: Move
F5: Previous Values F6: Fail-Safe Defaults F7: Optimized Defaults
Enter: Select +/-/PU/PD: Value F10: Save ESC: Exit F1: General Help
Menu Level
Item Help
DRAM Clock/Drive Control [Press Enter]
Auto Detect PCI Clk [Enabled]
Spread Spectrum [0.25%]
Frequency / Voltage Control
Phoenix - AwardBIOS CMOS Setup Utility
DRAM Clock
The chipset supports synchronous and asynchronous mode between host
clock and DRAM clock frequency.
Settings: [By SPD, 100 MHz, 133 MHz, 166 MHz, 200MHz, 266MHz]
Auto Detect PCI Clk
Settings: [Disabled, Enabled]
Spread Spectrum
When the mainboard's clock generator pulses, the extreme values (spikes) of
the pulses create EMI (Electromagnetic Interference). The Spread Spectrum
function reduces the EMI generated by modulating the pulses so that the
spikes of the pulses are reduced to flatter curves.
Settings: [Disabled, 0.20%, 0.25%, 0.35%]